From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFDF0C6FD18 for ; Tue, 25 Apr 2023 03:21:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233243AbjDYDVW (ORCPT ); Mon, 24 Apr 2023 23:21:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233193AbjDYDVR (ORCPT ); Mon, 24 Apr 2023 23:21:17 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3F7EAD1F; Mon, 24 Apr 2023 20:20:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=WEmClTcIG/yj2IJg2sMiouG+QJxouKRVrQEnosw5z4s=; b=lHuHBQgxtGQ7hCHiZ49FHe946W 3+YvjIbp/kUPYSW8rNA2w6o/dbTaU1RGzEaFNqq70fbAzHQId0sA2mDQLFbQtHffsphxbRQ0nCeOr OlCMK6hXChNY2gokiMEfK+j5fwQHiYEjY70q5otsrSLxC+bomaXBb2E1X79/c8J+ndg0=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1pr9EJ-00B9Ke-UK; Tue, 25 Apr 2023 05:20:35 +0200 Date: Tue, 25 Apr 2023 05:20:35 +0200 From: Andrew Lunn To: Jakub Kicinski Cc: Daniel Golle , Heiner Kallweit , netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Russell King , "David S. Miller" , Eric Dumazet , Paolo Abeni , Qingfang Deng , SkyLake Huang , Matthias Brugger , AngeloGioacchino Del Regno Subject: Re: [PATCH v2] net: phy: add driver for MediaTek SoC built-in GE PHYs Message-ID: <651ef153-7555-4ae1-a068-cbe5f0da7e34@lunn.ch> References: <20230424183755.3fac65b0@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230424183755.3fac65b0@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 24, 2023 at 06:37:55PM -0700, Jakub Kicinski wrote: > On Sat, 22 Apr 2023 13:36:58 +0100 Daniel Golle wrote: > > Some of MediaTek's Filogic SoCs come with built-in gigabit Ethernet > > PHYs which require calibration data from the SoC's efuse. > > Despite the similar design the driver doesn't share any code with the > > existing mediatek-ge.c, so add support for these PHYs by introducing a > > new driver for only MediaTek's ARM64 SoCs. > > Andrew, Heiner, how do you feel about this driver? It is 95% magic values in magic registers which nobody is every going to understand without the datasheet. Assuming any of it is actually in the data sheet. I really think the firmware in this PHY needs a re-write to avoid exposing all this to the OS. But i don't know if we have that level of NACK. Having said that, there is a nice quote in LWN from Thomas Gleixer about this: https://lwn.net/Articles/928946/ This does seem like a case of 'throw hardware/firmware over the fence and let software folks deal with it.' There is no other PHY like it in Linux. So i would like to reject it, but i then suspect we are punishing the wrong people, Daniel not MediaTek. I would also drop the LED configuration parts. Leave it at reset defaults for the moment. It seems like the generic support for controlling PHY LEDs is making progress and will be merged next cycle. Andrew