From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C338628379; Wed, 3 Jul 2024 03:40:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719978012; cv=none; b=NAWuUPRTIfJAjQz/jMRiMCcaD2rSh/ab4+ot29PDhYOpjlse/e+ZQLnOi13nbMouwnK/zNOxsXye6uu3m7TVuRPBlawkKunJkULsE3Sz5gFR5cRqv1WycQJq/8UEcuJaPARiziNB8ak1XY3o8oQCQ9X7/qs/3zm1IKBxqj3k6Iw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719978012; c=relaxed/simple; bh=M3gsERjcbjsNq/Gxcdwyw4WmdX/3lkdL6b5Mc9WmBOc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=cJr6CQBOSOw973ueYu0Kl0yu1gDSHW6cnsfoaeIlXCj3/kcdss3N+w/zYnKaWncqBHgP3p8dxjzKbrzismVcI9DfgmqR5QLK0pO37nE4rPFz729aBuTt4JMMuYQ+c1RPYPSmseM/YFhSckIT7lxtpmg9zAtoiw+SryP1qQHuBXI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=kome2z1F; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="kome2z1F" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=TATpo3rifH1vuYMWqwmPHFaKqfkHrmIpDNZEDdKjNX0=; b=kome2z1FuUYJlJbL2/gYIegsHG 12xvgR78xHCIZAO61Qn9kFMcsJf+3jHmUXGNX1zRDxDeJi5cTRh9SICXZ6o36sI1p9f/MqqaowT+A Pgv8Q1qEsiCD/5yftsO8i159uaHp8qVgL0PX9p62dkuVE/BaJRI58FZP05uAPKuDE4pI=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1sOqqT-001ghu-GH; Wed, 03 Jul 2024 05:39:49 +0200 Date: Wed, 3 Jul 2024 05:39:49 +0200 From: Andrew Lunn To: Chris Packham Cc: Luiz Angelo Daros de Luca , Linus Walleij , "alsi@bang-olufsen.dk" , Florian Fainelli , "olteanv@gmail.com" , Marek =?iso-8859-1?Q?Beh=FAn?= , "ericwouds@gmail.com" , David Miller , Eric Dumazet , "kuba@kernel.org" , Paolo Abeni , "justinstitt@google.com" , "rmk+kernel@armlinux.org.uk" , netdev , "linux-kernel@vger.kernel.org" , "sander@svanheule.net" Subject: Re: net: dsa: Realtek switch drivers Message-ID: <65566aaa-ba49-4ad9-ab3f-9d49780a809b@lunn.ch> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: > One reason for using DSAI've just found is that in theory the RTL930x > supports a CPU disabled mode where you do connect it to an external CPU and > the data travels over SGMII like you'd get with a traditional DSA design. > It's not a mode I'm planning on supporting anytime soon but it might come up > when I get round to submitting some patches. You might want to look at ocelot, which is both a pure switchdev and a DSA driver. Its design is not great because it became dual later in its life. I suspect it would be designed differently if this has been considered at the beginning. Andrew