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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by BN7PEPF0000009E.mail.protection.outlook.com (10.167.248.150) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.8 via Frontend Transport; Sun, 20 Sep 2026 18:18:21 +0000 Received: from purico-9dcchost.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49; Sun, 20 Sep 2026 13:18:20 -0500 From: Melody Wang To: CC: LKML , Tom Lendacky , , Melody Wang Subject: [PATCH v3 6/8] x86/sev: Register the guest with the SVSM APIC protocol Date: Sun, 20 Sep 2026 18:16:58 +0000 Message-ID: <656edc5467df7d8c33676f0a80c3042885d95f9b.1789927246.git.huibo.wang@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN7PEPF0000009E:EE_|DM4PR12MB6350:EE_ X-MS-Office365-Filtering-Correlation-Id: cd24b47f-84bf-47cb-b6d2-08df17438d8b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|82310400026|36860700016|376014|1800799024|10067099003|56012099006|3023799007|18002099003|22082099003|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fqmm0O8VjPIkBptNzQdJd291CXlw5lsqPVeAcFSQitgfGVR0adxvqE4d4GtOr8Li/4kX6O7u2AQXST8qXyG+HAYlnJvCirhlrlS/KJC51rYJEnwPd8lOPDupE4ES6G/oBm22Pb2o/ac51mJvjMm4hnPMUTgikB2jCNMyzb1jCBKigTKCerXayP/Wqc3lHbbN59IEtSu5YfvfQ+GaHZkzR1s34GF0j/oa8cItGeLeyURahAIQk5QiU8r/Y8auNEr2jIysyMZZojn4XQ7IAYr/lKJBBtRKJQQF21HfFhfCi0op4dmI7TI06amaL7U5R9JIICiqib3PznM4khzW3u+7vMxVY0FFptArbviRROQ5Mh1tNjIhxJeyyBZm7hbeMKnkYYxHVnB8Zmj/kgHIBOdyMt4/ZrzbP/dDjSIyLB//MqcgpvrUpG5u7jz8oNVwAWYW X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2026 18:18:21.4344 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cd24b47f-84bf-47cb-b6d2-08df17438d8b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN7PEPF0000009E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6350 The SVSM APIC protocol supports 5 calls. SVSM_APIC_CONFIGURE_EMULATION (shortened to SVSM_APIC_CONFIG_EMULATION for brevity), call 1, provides the controls whether the guest can make use of the SVSM APIC protocol. Implement this call, and register Alternate Injection for the guest by default. Signed-off-by: Melody Wang --- arch/x86/boot/compressed/sev.c | 23 +++++++++++++++++++++++ arch/x86/boot/compressed/sev.h | 6 ++++++ arch/x86/include/asm/sev.h | 2 ++ drivers/firmware/efi/libstub/x86-stub.c | 3 +++ 4 files changed, 34 insertions(+) diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c index fc2029746c50..9f776ba7f123 100644 --- a/arch/x86/boot/compressed/sev.c +++ b/arch/x86/boot/compressed/sev.c @@ -511,3 +511,26 @@ bool early_is_sevsnp_guest(void) } return true; } + +/* + * When the guest is running at VMPL2 with Alternate Injection enabled, + * register Alternate Injection before ExitBootServices(). + */ +void svsm_register_alt_inj(void) +{ + if (early_is_sevsnp_guest() && snp_vmpl) { + struct svsm_call call = {}; + int ret; + + if (!(sev_get_status() & MSR_AMD64_SNP_ALTERNATE_INJ)) + return; + + call.caa = (struct svsm_ca *)boot_svsm_caa_pa; + call.rax = SVSM_APIC_CALL(SVSM_APIC_CONFIG_EMULATION); + call.rcx = SVSM_AI_REGISTER; + + ret = svsm_call_msr_protocol(&call); + if (ret) + sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_ALT_INJ_FAIL); + } +} diff --git a/arch/x86/boot/compressed/sev.h b/arch/x86/boot/compressed/sev.h index 22637b416b46..dd058af2e7aa 100644 --- a/arch/x86/boot/compressed/sev.h +++ b/arch/x86/boot/compressed/sev.h @@ -12,6 +12,12 @@ #include +enum svsm_ai_ctrl { + SVSM_AI_DISABLE, + SVSM_AI_DEREGISTER, + SVSM_AI_REGISTER, +}; + void snp_accept_memory(phys_addr_t start, phys_addr_t end); u64 sev_get_status(void); bool early_is_sevsnp_guest(void); diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index 3cb6c5d6a6e0..c1e31fc9c918 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -543,6 +543,7 @@ enum es_result savic_register_gpa(u64 gpa); enum es_result savic_unregister_gpa(u64 *gpa); u64 sev_apic_ghcb_msr_read(u32 reg); void sev_apic_ghcb_msr_write(u32 reg, u64 value); +void svsm_register_alt_inj(void); static __always_inline void vc_ghcb_invalidate(struct ghcb *ghcb) { @@ -652,6 +653,7 @@ static inline enum es_result savic_register_gpa(u64 gpa) { return ES_UNSUPPORTED static inline enum es_result savic_unregister_gpa(u64 *gpa) { return ES_UNSUPPORTED; } static inline void sev_apic_ghcb_msr_write(u32 reg, u64 value) { } static inline u64 sev_apic_ghcb_msr_read(u32 reg) { return 0; } +static inline void svsm_register_alt_inj(void) { } #endif /* CONFIG_AMD_MEM_ENCRYPT */ diff --git a/drivers/firmware/efi/libstub/x86-stub.c b/drivers/firmware/efi/libstub/x86-stub.c index 49388524a61f..35b8641119b9 100644 --- a/drivers/firmware/efi/libstub/x86-stub.c +++ b/drivers/firmware/efi/libstub/x86-stub.c @@ -793,6 +793,9 @@ static bool sev_prepare(void) unsupported); return true; } + + svsm_register_alt_inj(); + return false; } -- 2.43.0