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Wed, 30 Jul 2025 10:30:57 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 56UAUuX0021581 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Jul 2025 10:30:56 GMT Received: from [10.218.4.141] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 30 Jul 2025 03:30:52 -0700 Message-ID: <6580fe88-721a-4d78-baef-514de681d072@quicinc.com> Date: Wed, 30 Jul 2025 16:00:49 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V1 2/3] arm64: dts: qcom: sm8650: Enable MCQ support for UFS controller To: Krzysztof Kozlowski , , , , , , , , , , CC: , , , References: <20250730082229.23475-1-quic_rdwivedi@quicinc.com> <20250730082229.23475-3-quic_rdwivedi@quicinc.com> <4f52b237-7380-46f3-9a26-bf3c11274523@kernel.org> Content-Language: en-US From: Ram Kumar Dwivedi In-Reply-To: <4f52b237-7380-46f3-9a26-bf3c11274523@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Mpx3EiDzVgQqSBJcA6Zjxb0IsqdyQszk X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzMwMDA3MiBTYWx0ZWRfX/H8pvYu3qWdz S1kRKFbTRcRYDsdxhy6x0Tl9OfPno+RYA9gLZ9HwTWrei6viW3ZtpNxx47Ca6F/N2ZU4zHZMpm/ l101ku7NJ/EhBiCYqoE26Y7Uj7agbz79jLz9Yc3nz6o56Fl1bp7c0ffnN51YXp9qVgby2X8u7Q+ A0eZQpw0OEFlRsbyomuvdllCIyPyuP//EZi+6P+yYDtzDkhRZ7XLCXAUxxNdcTlxgl5CrjGQMS3 hnhGeChIGKsEzaAgEaupSGfOyOK/jABhO/W+UmTvNzCnADOyYgW75H8QnFfLC+boMz3Eorx4gzl 4VxvKLe6b9FN3mhCPIcNNStFDMoATgiGdG6xvyVc6+irc/QM5eVuM7xoax1OuBBmpZfDYPstsXA gj3iaTzOmDdlDA97nEdn8oFgBiMaaGyWbiSpPavmqQH7oln7BE9y4pzItDXMSJIoxbQRbVSz X-Authority-Analysis: v=2.4 cv=DIWP4zNb c=1 sm=1 tr=0 ts=6889f461 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=pCQ47apHa_6Vw97M47QA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-ORIG-GUID: Mpx3EiDzVgQqSBJcA6Zjxb0IsqdyQszk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-30_04,2025-07-30_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 impostorscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 adultscore=0 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507300072 On 30-Jul-25 2:42 PM, Krzysztof Kozlowski wrote: > On 30/07/2025 10:22, Ram Kumar Dwivedi wrote: >> Enable Multi-Circular Queue (MCQ) support for the UFS host controller >> on the Qualcomm SM8650 platform by updating the device tree node. This >> includes adding new register regions and specifying the MSI parent >> required for MCQ operation. >> >> MCQ is a modern queuing model for UFS that improves performance and >> scalability by allowing multiple hardware queues. >> >> Changes: >> - Add reg entries for mcq_sqd and mcq_vs regions. >> - Define reg-names for the new regions. >> - Specify msi-parent for interrupt routing. > > > We see that from the diff. Drop redundant description, your first > paragraph already said this. > > Best regards, > Krzysztof Hi Krzysztof, I will update it in the next patchset. Thanks, Ram.