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From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: <rkrcmar@redhat.com>, <pbonzini@redhat.com>,
	<alex.williamson@redhat.com>, <kvm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <sherry.hurwitz@amd.com>
Subject: Re: [PART2 PATCH v5 06/12] iommu/amd: Adding GALOG interrupt handler
Date: Tue, 16 Aug 2016 09:43:00 +0700	[thread overview]
Message-ID: <65d32f61-7d23-b7b7-cfb3-8ec4653a0e82@amd.com> (raw)
In-Reply-To: <20160809144347.GC1437@8bytes.org>

Hi Joerg,

On 8/9/16 21:43, Joerg Roedel wrote:
> On Mon, Jul 25, 2016 at 04:32:05AM -0500, Suthikulpanit, Suravee wrote:
>> From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
>>
>> This patch adds AMD IOMMU guest virtual APIC log (GALOG) handler.
>> When IOMMU hardware receives an interrupt targeting a blocking vcpu,
>> it creates an entry in the GALOG, and generates an interrupt to notify
>> the AMD IOMMU driver.
>>
>> At this point, the driver processes the log entry, and notify the SVM
>> driver via the registered iommu_ga_log_notifier function.
>>
>> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
>> ---
>>  drivers/iommu/amd_iommu.c | 77 +++++++++++++++++++++++++++++++++++++++++++++--
>>  include/linux/amd-iommu.h | 20 ++++++++++--
>>  2 files changed, 91 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
>> index abfb2b7..861d723 100644
>> --- a/drivers/iommu/amd_iommu.c
>> +++ b/drivers/iommu/amd_iommu.c
>> @@ -741,14 +741,78 @@ static void iommu_poll_ppr_log(struct amd_iommu *iommu)
>>  	}
>>  }
>>
>> +#ifdef CONFIG_IRQ_REMAP
>> +static int (*iommu_ga_log_notifier)(u32);
>> +
>> +int amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
>> +{
>> +	iommu_ga_log_notifier = notifier;
>> +
>> +	return 0;
>> +}
>> +EXPORT_SYMBOL(amd_iommu_register_ga_log_notifier);
>> +
>> +static void iommu_poll_ga_log(struct amd_iommu *iommu)
>> +{
>> +	u32 head, tail, cnt = 0;
>> +
>> +	if (iommu->ga_log == NULL)
>> +		return;
>> +
>> +	head = readl(iommu->mmio_base + MMIO_GA_HEAD_OFFSET);
>> +	tail = readl(iommu->mmio_base + MMIO_GA_TAIL_OFFSET);
>> +
>> +	while (head != tail) {
>> +		volatile u64 *raw;
>> +		u64 log_entry;
>> +
>> +		raw = (u64 *)(iommu->ga_log + head);
>> +		cnt++;
>> +
>> +		/* Avoid memcpy function-call overhead */
>> +		log_entry = *raw;
>> +
>> +		/* Update head pointer of hardware ring-buffer */
>> +		head = (head + GA_ENTRY_SIZE) % GA_LOG_SIZE;
>> +		writel(head, iommu->mmio_base + MMIO_GA_HEAD_OFFSET);
>> +
>> +		/* Handle GA entry */
>> +		switch (GA_REQ_TYPE(log_entry)) {
>> +		case GA_GUEST_NR:
>> +			if (!iommu_ga_log_notifier)
>> +				break;
>> +
>> +			pr_debug("AMD-Vi: %s: devid=%#x, ga_tag=%#x\n",
>> +				 __func__, GA_DEVID(log_entry),
>> +				 GA_TAG(log_entry));
>> +
>> +			if (iommu_ga_log_notifier(GA_TAG(log_entry)) != 0)
>> +				pr_err("AMD-Vi: GA log notifier failed.\n");
>> +			break;
>> +		default:
>> +			break;
>> +		}
>> +
>> +		/* Refresh ring-buffer information */
>> +		head = readl(iommu->mmio_base + MMIO_GA_HEAD_OFFSET);
>> +		tail = readl(iommu->mmio_base + MMIO_GA_TAIL_OFFSET);
>
> Couldn't that cause an endless-loop in case of an interrupt storm from a
> device? I think it is better to just read head and tail once before the
> loop and update head after we get out of the loop. Any new entries
> could be handled by the next iommu interrupt. This avoids any
> soft-lockups that might happen when the loop runs for too long.
>

Sure. Also, we might need to start handling GALogOverflow as well. 
However, let's put that in a separate patch series. What do you think?

S

  reply	other threads:[~2016-08-16  2:42 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-25  9:31 [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support Suravee Suthikulpanit
2016-07-25  9:32 ` [PART2 PATCH v5 01/12] iommu/amd: Detect and enable guest vAPIC support Suravee Suthikulpanit
2016-08-09 14:30   ` Joerg Roedel
2016-07-25  9:32 ` [PART2 PATCH v5 02/12] iommu/amd: Move and introduce new IRTE-related unions and structures Suravee Suthikulpanit
2016-07-25  9:32 ` [PART2 PATCH v5 03/12] iommu/amd: Introduce interrupt remapping ops structure Suravee Suthikulpanit
2016-07-25  9:32 ` [PART2 PATCH v5 04/12] iommu/amd: Add support for multiple IRTE formats Suravee Suthikulpanit
2016-07-25  9:32 ` [PART2 PATCH v5 05/12] iommu/amd: Detect and initialize guest vAPIC log Suravee Suthikulpanit
2016-07-25  9:32 ` [PART2 PATCH v5 06/12] iommu/amd: Adding GALOG interrupt handler Suravee Suthikulpanit
2016-08-09 14:43   ` Joerg Roedel
2016-08-16  2:43     ` Suravee Suthikulpanit [this message]
2016-07-25  9:32 ` [PART2 PATCH v5 07/12] iommu/amd: Introduce amd_iommu_update_ga() Suravee Suthikulpanit
2016-07-25  9:32 ` [PART2 PATCH v5 08/12] iommu/amd: Implements irq_set_vcpu_affinity() hook to setup vapic mode for pass-through devices Suravee Suthikulpanit
2016-07-25  9:32 ` [PART2 PATCH v5 09/12] iommu/amd: Enable vAPIC interrupt remapping mode by default Suravee Suthikulpanit
2016-08-09 14:54   ` Joerg Roedel
2016-07-25  9:32 ` [PART2 PATCH v5 10/12] svm: Introduces AVIC per-VM ID Suravee Suthikulpanit
2016-08-12 14:16   ` Radim Krčmář
2016-08-18 12:24     ` Suravee Suthikulpanit
2016-07-25  9:32 ` [PART2 PATCH v5 11/12] svm: Introduce AMD IOMMU avic_ga_log_notifier Suravee Suthikulpanit
2016-08-12 14:27   ` Radim Krčmář
2016-07-25  9:32 ` [PART2 PATCH v5 12/12] svm: Implements update_pi_irte hook to setup posted interrupt Suravee Suthikulpanit
2016-08-13 12:03   ` Radim Krčmář
2016-08-16 15:19     ` Suravee Suthikulpanit
2016-08-16 16:33       ` Radim Krčmář
2016-08-18 15:43         ` Suravee Suthikulpanit
2016-08-08 14:42 ` [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support Suravee Suthikulpanit
2016-08-09 14:58   ` Joerg Roedel
2016-08-12  4:11     ` Suravee Suthikulpanit

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