Re: [PATCH 2/3] arm64: dts: qcom: sm8650: add support for the SM8650-HDK board

[Neil Armstrong <neil.armstrong@linaro.org>]

On 03/03/2024 00:26, Vladimir Zapolskiy wrote:
> Hi Neil,
> 
> On 2/23/24 10:52, Neil Armstrong wrote:
>> The SM8650-HDK is an embedded development platforms for the
>> Snapdragon 8 Gen 3 SoC aka SM8650, with the following features:
>> - Qualcomm SM8650 SoC
>> - 16GiB On-board LPDDR5
>> - On-board WiFi 7 + Bluetooth 5.3/BLE
>> - On-board UFS4.0
>> - M.2 Key B+M Gen3x2 PCIe Slot
>> - HDMI Output
>> - USB-C Connector with DP Almode & Audio Accessory mode
>> - Micro-SDCard Slot
>> - Audio Jack with Playback and Microphone
>> - 2 On-board Analog microphones
>> - 2 On-board Speakers
>> - 96Boards Compatible Low-Speed and High-Speed connectors [1]
>>    - For Camera, Sensors and external Display cards
>>      - Compatible with the Linaro Debug board [2]
> 
> what are these [1] and [2] references? Probably there might be some links.

Indeed

> 
>>      - SIM Slot for Modem
>>      - Debug connectors
>>      - 6x On-Board LEDs
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/Makefile       |    1 +
>>   arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 1259 +++++++++++++++++++++++++++++++
>>   2 files changed, 1260 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index 7d40ec5e7d21..4f48c98451de 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -241,6 +241,7 @@ dtb-$(CONFIG_ARCH_QCOM)    += sm8450-sony-xperia-nagara-pdx224.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)    += sm8550-hdk.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)    += sm8550-mtp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)    += sm8550-qrd.dtb
>> +dtb-$(CONFIG_ARCH_QCOM)    += sm8650-hdk.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)    += sm8650-mtp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)    += sm8650-qrd.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)    += x1e80100-crd.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
>> new file mode 100644
>> index 000000000000..cb1e0f569483
> 
> <snip>
> 
>> +
>> +&i2c6 {
>> +    clock-frequency = <400000>;
>> +    status = "okay";
>> +
> 
> <snip>
> 
>> +};
>> +
>> +&i2c3 {
>> +       status = "okay";
>> +
> 
> <snip>
> 
>> +};
> 
> Please change the order of i2c3 and i2c6.

Ack

> 
> <snip>
> 
>> +&pcie_1_phy_aux_clk {
>> +    clock-frequency = <1000>;
>> +};
>> +
> 
> May be put the clock above after &pcie1_phy like in the list of gcc
> source clocks?

Ack
> 
>> +&pcie0 {
>> +    wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
>> +    perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
>> +
>> +    pinctrl-0 = <&pcie0_default_state>;
>> +    pinctrl-names = "default";
>> +
>> +    status = "okay";
>> +};
>> +
>> +&pcie0_phy {
>> +    vdda-phy-supply = <&vreg_l1i_0p88>;
>> +    vdda-pll-supply = <&vreg_l3i_1p2>;
>> +
>> +    status = "okay";
>> +};
>> +
>> +&pcie1 {
>> +    wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
>> +    perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
>> +
>> +    pinctrl-0 = <&pcie1_default_state>;
>> +    pinctrl-names = "default";
>> +
>> +    status = "okay";
>> +};
>> +
>> +&pcie1_phy {
>> +    vdda-phy-supply = <&vreg_l3e_0p9>;
>> +    vdda-pll-supply = <&vreg_l3i_1p2>;
>> +    vdda-qref-supply = <&vreg_l1i_0p88>;
>> +
>> +    status = "okay";
>> +};
>> +
> 
> So I've found just these minor things, and I've successfully tested
> the dtb on the SM8650-HDK board.
> 
> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
> Tested-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
> 
> -- 
> Best wishes,
> Vladimir

Thanks,
Neil