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AJvYcCX6c/0sstuaUnkGrc6+T/A8SaGtEd6SDgSjjrEsO4pSAkEKHFSuCUR3MRJn0bWMHxIWawDoYdSN/BIy8aD0EXU83oHLln16hBHdltLA X-Gm-Message-State: AOJu0YxTgUvZX8s5I1SoVa5LMQafOOYT7sbd8gvSEJNtUNKjijSwSgDG K4SCM7krUqdeEoDt4mZzAzYwJMv8ePAsnhQD2UvS9Rn7n/eyJwShBh9HxAaFMmI= X-Google-Smtp-Source: AGHT+IE6vgU1QtCbosxprgy3+2vqnzOl54xK/Up6rxm39ABPLyAtmfvPFkFv7O9F9eu23nt8CCSZcQ== X-Received: by 2002:a50:d703:0:b0:57c:9d54:67cf with SMTP id 4fb4d7f45d1cf-57d4bd79da4mr2599999a12.21.1719205036154; Sun, 23 Jun 2024 21:57:16 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.70]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57d303d7aecsm4209761a12.20.2024.06.23.21.57.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 23 Jun 2024 21:57:15 -0700 (PDT) Message-ID: <65dcadf2-9247-4c65-84fa-ef982bfe79b0@tuxon.dev> Date: Mon, 24 Jun 2024 07:57:14 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] pinctrl: renesas: rzg2l: Adjust bit masks for PIN_CFG_VARIABLE to use BIT(62) Content-Language: en-US To: Prabhakar , Geert Uytterhoeven , Linus Walleij Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Biju Das , Fabrizio Castro , Lad Prabhakar References: <20240618174831.415583-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240618174831.415583-3-prabhakar.mahadev-lad.rj@bp.renesas.com> From: claudiu beznea In-Reply-To: <20240618174831.415583-3-prabhakar.mahadev-lad.rj@bp.renesas.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.06.2024 20:48, Prabhakar wrote: > From: Lad Prabhakar > > Shift the bit masks for `PIN_CFG_PIN_MAP_MASK` and `PIN_CFG_PIN_REG_MASK`, > to accommodate `PIN_CFG_VARIABLE` using `BIT(62)`. > > Previously, these bit masks were placed higher up in the bit range, which > did not leave room for `PIN_CFG_VARIABLE` at `BIT(62)`. By adjusting these > masks, we ensure that `PIN_CFG_VARIABLE` can occupy `BIT(62)` without any > conflicts. The updated masks are now: > - `PIN_CFG_PIN_MAP_MASK`: `GENMASK_ULL(61, 54)` (was `GENMASK_ULL(62, 55)`) > - `PIN_CFG_PIN_REG_MASK`: `GENMASK_ULL(53, 46)` (was `GENMASK_ULL(54, 47)`) > > Signed-off-by: Lad Prabhakar Tested-by: Claudiu Beznea > --- > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > index bfaeeb00ac4a..b79dd1ea2616 100644 > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > @@ -87,8 +87,8 @@ > PIN_CFG_FILNUM | \ > PIN_CFG_FILCLKSEL) > > -#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(62, 55) > -#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(54, 47) > +#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(61, 54) > +#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(53, 46) > #define PIN_CFG_MASK GENMASK_ULL(31, 0) > > /*