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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33bcfc12fa0sm359020a91.13.2025.10.16.16.28.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Oct 2025 16:28:47 -0700 (PDT) Message-ID: <662a21a3-de8b-406f-a15d-b8a572aa79ab@oss.qualcomm.com> Date: Thu, 16 Oct 2025 16:28:45 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/6] media: qcom: camss: vfe: Add support for VFE 1080 To: Bryan O'Donoghue , Hangxiang Ma , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , Vladimir Zapolskiy , Mauro Carvalho Chehab Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com, Jingyi Wang , Atiya Kailany References: <20251014-add-support-for-camss-on-kaanapali-v2-0-f5745ba2dff9@oss.qualcomm.com> <20251014-add-support-for-camss-on-kaanapali-v2-6-f5745ba2dff9@oss.qualcomm.com> <8d61f29b-ba02-4757-b8cd-5fb51b998acb@kernel.org> <1aa133b9-2a99-47cb-8309-7e49b5dc4f85@oss.qualcomm.com> Content-Language: en-US From: Vijay Kumar Tumati In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: xJrwjOdOVWWrfRVF50xolKKaLgjTJ70p X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDExMDAxOCBTYWx0ZWRfX6tT2Dv5fT5j8 oz9YRKrdSV1yOepRBFYbO6sv0dzkPfrRGhLJUBHAHmQoAYVT0lCNCbOKbol5TfYMceCre4APaIU tColo1a3BQi7wqyTdvYIyrgmbI1XTCddf4pEoLlUL9+aJLj5EnT6QEYnSG+wOAbQNVYQevbnnlA VPe4QnCMeWckO79oubzEmacCp//OAE+LEIrmkxmhqWctytJgdFzLYGHkchTmtOcNhv7TZrTzm8O PjU5tBG/W35BvH1hOY+wpcRnwTye+OeTYVAWazC/++fEdm5b94cj9RrqtA8dkemuHqGdOS8Vh6Z QSoOJRO5AhIp/MURxKR2d4HLbx4RE8SKjU90qKuCncDzhj2oG72IBI9+Bo5syOe5DlhLG54oKWr m5Qr8kUIMQ1ZhIgaIyVFmVOc7LuGyw== X-Proofpoint-GUID: xJrwjOdOVWWrfRVF50xolKKaLgjTJ70p X-Authority-Analysis: v=2.4 cv=PdTyRyhd c=1 sm=1 tr=0 ts=68f17fb1 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=blchzdlE1R3GHN3_IVwA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-16_04,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 bulkscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510110018 On 10/16/2025 3:54 AM, Bryan O'Donoghue wrote: > On 16/10/2025 11:33, Hangxiang Ma wrote: >>> But why ? >>> >>> --- >>> bod >> That a story. When testing the RDI path on Kaanapali, we found one image >> buffer starved at 19/20 stage. We want to capture 20 images but only 19 >> received. >> >> On Kaanapali, the AUP and RUP are split into two separate registers not >> a single one. Maybe this hardware change impacts something. Calling >> ops->reg_update() in vfe_enable_output_v2 function only applies one >> buffer address. The downstream code defers AUP and RUP to CSID >> configuration stage. We mimic that and find it can solve this issue. >> >> --- >> Hangxiang > > So this is the type of interesting detail that I'd go looking for in a > commit log, a comment in the code or a footnote in the cover letter. > > One or two sentences in the commit log will do. > > --- > bod > @Bryan, let me throw a bit more light here. I don't think the 19/20 buffers issue or the AUP-RUP register separation has anything to do about this (at least not the first for sure). Fundamentally, on Kaanapali architecture (or any architecture for that matter), the HW guidance is to issue the reg_update (corresponding register write) after all of the CSID configuration registers are written. It had always been working for other chip sets to write to this register first and then write the CSID registers but Kaanapali seems to have very strict dependency in the hardware about this sequence and with the original sequence, no RUP DONE or BUF DONE events are received at all. Hence the need for this change. The 19/20 buffer issue that Hangxiang mentioned about is a follow up of this where we enqueue two buffers to the RDI write master from 'vfe_enable_output_v2()' but issue only one AUP update after the CSID config. That was when we needed to add 'CAMSS_INIT_BUF_COUNT' and use consistently at both places. Hope this makes sense now. Please let us know if you have any questions still. Thank you.