From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96FF23A963A for ; Mon, 25 May 2026 07:06:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779692807; cv=none; b=U9gTdc9EDMrbLGk9n0m0CtWYzy5o28v6sycmEPE5XWmKxvTMKwyEOmL0wK7oTG+1Y1SdWaFyrkPEQ1xM4O/ImFUreBRdqVJB2ggScUsqRlY2+frycFENZdMLyGfyZoy3MLiyD1eLxCt8hhzU2ys0YoaLitr2iZeHiFstQtu4UJM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779692807; c=relaxed/simple; bh=m9oogMcTFdVycGrltx0hH1QPpPdlBZgo0o40YOuoCZE=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=i/Q35bSAx5BmIY5qELqjAxSW/QMk80ohr72cmCotNWLX4w3+xP/LsMOl1lDj49eiGT/r1oR3pe5rzoU+e/+QV5LRyP/OCL9XIqF7G+/iOheHfj+ite5ySPgb1vbEW6Tj+UBFXe66IibTmtTrWt35Js/J8R5IAGjOV13KIZBQfV0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=VBavmqBT; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=HxMi8EV9; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="VBavmqBT"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="HxMi8EV9" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64P1cqVW3241878 for ; Mon, 25 May 2026 07:06:44 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= PztoOF4NbfiDG8yee7TktqGlOi6z/P5gJ41vD8fwEK4=; b=VBavmqBTPXTLJHsp avOpVTI8iw/wpN/3SASQZA+myXg1PGacSa+Yt4zGJVE7AohDiFaOROFdsro4jMYN AB/csJYymjpLHlVpQYjQFMpjVIEgiVxmeCLIUNtc7yECkatsAn+0rU6Opn93TEtL FtBkD0q9Fxwy/Jt8NxDE6f1lAGLVyGsuNur5CfWxOu8bR6j5gyc3+ehjV0N2m3Im haV+xzYQDIrD5cvPedQKacRVBszRIO8d7wMpXVXV3IHbT+qjqRvqMLbeq1UfuPKR fUTefWeQSE+v/7bs3X3vvkG9W72rlyWLDWyNh0ZXibqOs6l88u7sWBAE6KrEGypr ImupaQ== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4eb4aswgnp-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 25 May 2026 07:06:44 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-82fa2165c3eso5867028b3a.0 for ; Mon, 25 May 2026 00:06:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1779692803; x=1780297603; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=PztoOF4NbfiDG8yee7TktqGlOi6z/P5gJ41vD8fwEK4=; b=HxMi8EV9w5vZ1iZOgdo9jZi3U8qpy94e65gplbtC/2Tx/CUpNwC16SHlElSRpw0EdO m+2qXoQ5u4qvrrkFN2pnPQKFkuNO2frMgy/dxHH+0UESlqxjnAlkAaSEMqEi4QPDtyuy XhTnIkch/Nm8dDSWaanJ99QpZ4bSJMPXPuoR7x6sbEwrAzUcnaoJxzvHCI7h5JQ4Hwjg +3/2M1QlwUZe9PKzRQWtq45xlcwTA0+z06ll3Q1kwYYMMPupikiuTmbJUgYUNdGIel4L ImITHxnzm7DQcQTGmTYEJF4sWsWb5uaec9FMMdJtEgKFkVbZXc2KbZRS3LzZFzKhtN3f 6x9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779692803; x=1780297603; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=PztoOF4NbfiDG8yee7TktqGlOi6z/P5gJ41vD8fwEK4=; b=LbVf+B4Jeor7XPmAp95DdeS2dXFWw+ruViBHe/RvV6lHBRM327onG3jBA8wvGDLFQB NJ1BRIPr823IFabEz01yE5Pl5f8zYWKVSm3fcbD7Ni3RXvafMBxGAjj9xSAwLJVNhceJ e10+NpBb6nqr1b2soNFhyOQSwOnG3Db6uf6znhb+4FOqVuU9qsqfjDzeJSIx4WuY/1WV Nw0FE9PgbYUNccsSxbmQHxf882I4Od5LJ4bTDpUeEVmgOkzYME8nBlJIlrTEtMR9bCgC gG7IxRZs8Wx1nEQO0iujJJN3aAmmuGIVtXBAK4H7Hn4vsoACi2xipRHS+V/Wf1Gh3p3i M2Ug== X-Forwarded-Encrypted: i=1; AFNElJ9VH2C+2Up7hKc/UlHlCBHMybOk6Khj17vO9wujodRpbo8QlrPwVpokrvMJwu/FkcBXMovJoNZ6SrTNLk8=@vger.kernel.org X-Gm-Message-State: AOJu0Yz9m3wl7HjL15ZhELkQEkZPDZWoFMzWoYOsSK4JP4/R2S4Xf7NK MejA9dFYXu4OZ9O/b2dvADgoE0Qsmnhx5td43mxV6xTM1JR+P61Ng75Rn9j7nerxKoHig+3HImY F3SWUpxHGQh7Id54wemO4WKym6oiheUjOlg3Ch4epOunaNeWoOYrwmX1dfLGwGfeCgPY= X-Gm-Gg: Acq92OFcsOEAMzajFJS09CYzX5q2UHlMFQnDKaseydMYLgloEmJ3Bci65sGaOkxD7gP I5ra7euUSIDaodci+FcFsFipF1tKPOavuhVBtJwdkjzpYJ13wA0I3i5gErxY4Tu5eHLmbSwU0Qv lSymV3NIqoN6pI/5deg/mO1tcUS0rQyOaXG4iA9bnoYEdZ6QrOsPJIXo5H8I5ubYclMoH1E9q8A wtBuQH5CUsK5ehs+KRLPfIroDg8gKO8WbesM+Z66D7FH2U8rGmmepsZZHO0+ziMLEYdxFflzKn0 /+nv4nwFa2ibjF1MQ9Ab7Ipc5WEyk0ScqI/xD0BWo5PKusSErbbmIS2F/3PRG1AcbeFGjb6P59H YYZk0lWeIXm8M9JxRciBfWYCxHW2XVQnrRDc2koahP6HQxlR9xItsV7Pa4gOocr0= X-Received: by 2002:a05:6a00:22c6:b0:836:900e:8743 with SMTP id d2e1a72fcca58-8415f35d58amr13665913b3a.36.1779692803474; Mon, 25 May 2026 00:06:43 -0700 (PDT) X-Received: by 2002:a05:6a00:22c6:b0:836:900e:8743 with SMTP id d2e1a72fcca58-8415f35d58amr13665874b3a.36.1779692802978; Mon, 25 May 2026 00:06:42 -0700 (PDT) Received: from [10.218.5.182] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84164fbb66bsm8423647b3a.45.2026.05.25.00.06.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 25 May 2026 00:06:42 -0700 (PDT) Message-ID: <66335474-d600-45ab-9ac6-e946f24142c8@oss.qualcomm.com> Date: Mon, 25 May 2026 12:36:36 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/3] clk: qcom: camcc-glymur: Add camera clock controller driver To: Bryan O'Donoghue , Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das , Konrad Dybcio References: <20260517-glymur_camcc-v4-0-9d00acffdbf7@oss.qualcomm.com> <20260517-glymur_camcc-v4-2-9d00acffdbf7@oss.qualcomm.com> <8bd4365e-0171-425c-9738-0b186047cb15@kernel.org> <2a496bdf-4728-47b9-84ba-063712a6e5b6@oss.qualcomm.com> <0a197b43-a672-4849-91c7-6e5bfe3175f7@kernel.org> Content-Language: en-US From: Jagadeesh Kona In-Reply-To: <0a197b43-a672-4849-91c7-6e5bfe3175f7@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI1MDA2OSBTYWx0ZWRfX6h/nnCQkYFNt uJJB+ly0NC3guNOko3vRzAmcd5YQe3pEL8s2pemET7IIVHDqGAwxUjnSEgoUxvycXn3XyvXae4f 8/T+QtwYUvCTIx0OBjsUp3OqP5HawI7lar0eZzQQUXwVx76/4iTeDtcsrNcGZfovzk48LTG3+8w xr/eGVlbyP9LDlavJLz7IYo32wZCh5cKLUhENToCi9yv1Q4tE+513xdQAR+Xz1kXp7Ll7E2ExJS 8nXRSLBF6lE7sRllxxLqVh9iBdBOPUgjVImFTExCS3iB5FSSYe/h1CRXe2fQ62NSReFEcAR9veT UMYInWv0QEPOwdhJLm9hicqS8RbphH8qJ5nT9fkU2Yq2xUXRdtIuk7gJjZTyc/GIJ+RyJy3j0Wb 9a8FxtLmMSSzmcn7wbX73Lne57q2lhX4zjUeiKdk5ZxklpXb48NjnXjrI4hBHA/AR6h3S+9ef67 guRjy+DnFJAG6TPUbUQ== X-Proofpoint-ORIG-GUID: snIfx49jz_pblUg6aFTA2g2zURbVHMkW X-Proofpoint-GUID: snIfx49jz_pblUg6aFTA2g2zURbVHMkW X-Authority-Analysis: v=2.4 cv=c6ebhx9l c=1 sm=1 tr=0 ts=6a13f504 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=tk3pCZAdYsx0TBu0sJAA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-25_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 spamscore=0 malwarescore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605250069 On 5/18/2026 5:51 PM, Bryan O'Donoghue wrote: > On 18/05/2026 11:23, Jagadeesh Kona wrote: >> >> >> On 5/18/2026 1:05 PM, Bryan O'Donoghue wrote: >>> On 17/05/2026 18:33, Jagadeesh Kona wrote: >>>> +/* 1200.0 MHz Configuration */ >>>> +static const struct alpha_pll_config cam_cc_pll0_config = { >>>> +    .l = 0x3e, >>>> +    .alpha = 0x8000, >>>> +    .config_ctl_val = 0x25c400e7, >>>> +    .config_ctl_hi_val = 0x0a8060e0, >>>> +    .config_ctl_hi1_val = 0xf51dea20, >>>> +    .user_ctl_val = 0x00008408, >>>> +    .user_ctl_hi_val = 0x00000002, >>>> +}; >>> >>> I'll again push back on these magic numbers. >>> >>> At the very least you should be mentioning in the cover letter log why you _aren't_ making that change. >>> >>> Just reposting and hoping it slips by the person making the comment isn't too cool. >>> >>> Why can't qcom update the python? script that generates this code to enumerate fields instead of magic numbers here ? >>> >>> I get you don't want to do it but, just ignoring the review feedback is no OK. >>> >>> What gives ? >>> >> >> Hi Bryan, >> >> I haven't ignored your comments & already responded to your earlier comment on why the bit fields are not >> defined. Most of these values are static settings we get from PLL HW team and we program them only once >> as is during bootup and are never reused again anywhere from PLL code, so these bits are not defined. >> >> Please find the earlier responses for your comments below: >> https://lore.kernel.org/all/b92a2cbb-fe8d-4378-aa02-d91e2e4dfff4@oss.qualcomm.com/ >> https://lore.kernel.org/all/009ecdbb-2297-44eb-862d-233e3290691c@oss.qualcomm.com/ >> >> Thanks, >> Jagadeesh > > That's not in your overview letter so generally I'd advise to include things like "did X because Y" - "didn't do Q because Z" anyway, how does it make a difference if the values are static ? > > They are no less magic numbers that way. > > What exactly is the resistance to defining the bits ? > > I'll state again - when a vendor is submitting something upstream where that vendor 100% controls their own documentation - there's no reason at all to be presenting magic hex numbers - even more the case with generated code. > > Just update the script to enumerate the bit fields, I honestly don't get the aversion. > Hi Bryan, There’s no standard interface for these bits, and bit definitions/fields vary across PLL types. So, common macros aren’t feasible and would need redefinitions per controller. Since these bits are not reused elsewhere, IMO directly using values from the hardware documentation keeps the implementation simpler, avoids unnecessary abstraction, and makes debugging—through direct comparison with the hardware spec easier. Thanks, Jagadeesh