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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: DAmJh0l/dqcLmc/HGj5Auej35kC5JFoGFU+RPun+ZZoEN5zpt/eBecEFhwhCNgFpBaAy6AMVFG/f7c8iwL20ixuJ/thNOePPT7xfOY2ZycwDPq8NuagWwJnHilrpCgvO3pa/ln5HM1+vdUXnhx1Ng9tXDodIzdj4OyXRyKysKE7hpKoAuHi0D8h68c0jNV3hdgWBer02Hv2YLI0xQ3p7TqcVWuz31gkYxkcfg2koeUJkJtUqYTK66RBNsgNLj7Wt/BRo09j00E20/fch9X7Nhd2uqNk14Bm3Uth2zRj9xLHMt584TQ9Qm0K/l943YLrAx/OvnxF+FGrAKwR0xB8uI7TGEH7Z89kW4JKid3L6baCfLH1xbx8eiufvriM8oBN6qzUZ4+RazpNKk0Ks0eRmmhM9F/aAEDD6jyEvVOrwmUh06dFMwhSduHVeH1r9RpOI X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jan 2026 08:24:55.3302 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c8079bfb-6ec3-40ad-2561-08de5fd90c76 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DU6PEPF0000B61D.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB8635 Hi Sumit, For the whole patch-set: Reviewed-by: Pierre Gondois Thanks On 1/29/26 11:48, Sumit Gupta wrote: > As discussed in [7], v5 was split into two parts. This is part 1. > - Patch 1-3 from v6: Applied by Rafael for 6.20. > - Remaining patches: Included in this v7 with review comments addressed. > Part 2 (v5 patches 8-11) will follow separately. > > This patch series adds sysfs interfaces for CPPC min_perf, max_perf, > and perf_limited registers, along with supporting ACPI APIs and > improvements for the cppc_cpufreq driver. > > CPPC autonomous mode (auto_sel) enables hardware-driven CPU performance > scaling using Energy Performance Preference (EPP) hints. Currently, > there's limited runtime control and visibility into CPPC performance > registers. > > This series addresses these gaps by: > 1. Exposing min_perf/max_perf registers via sysfs (as frequency in kHz) > to allow fine-grained performance bounds control in autonomous mode. > 2. Exposing perf_limited register to detect and clear throttling events. > > It also includes code improvements: new APIs for reading performance > controls, a warning for missing mandatory DESIRED_PERF register, and > extended epp_perf support. > > The patches are grouped as below: > - Patch 1: Add cppc_get_perf() API (independent). > - Patch 2: Warn on missing mandatory DESIRED_PERF (independent). > - Patch 3: Extend cppc_set_epp_perf for FFH/SystemMemory (independent) > - Patch 4-5: APIs, sysfs for min/max_perf, perf_limited (independent) > - Patch 6: Doc for min/max_perf and perf_limited (depends on 4-5) > - Patch 7: Update cached perf_ctrls on sysfs write (independent). > > --- > v6[7] -> v7: > - patch 1-3 (v6): Dropped as they were applied by Rafael for 6.20. > - patch 2 (v7): Added new patch to warn on missing DESIRED_PERF as > suggested by Pierre. > - patch 4, 7 (v7): Removed mutex from sysfs store functions as > policy->rwsem already provides synchronization. > - patch 4 (v7): Added validation checks in store_min/max_perf. > > Sumit Gupta (7): > ACPI: CPPC: Add cppc_get_perf() API to read performance controls > ACPI: CPPC: Warn on missing mandatory DESIRED_PERF register > ACPI: CPPC: Extend cppc_set_epp_perf() for FFH/SystemMemory > ACPI: CPPC: add APIs and sysfs interface for min/max_perf > ACPI: CPPC: add APIs and sysfs interface for perf_limited > cpufreq: CPPC: Add sysfs for min/max_perf and perf_limited > cpufreq: CPPC: Update cached perf_ctrls on sysfs write > > .../ABI/testing/sysfs-devices-system-cpu | 44 ++++ > drivers/acpi/cppc_acpi.c | 214 +++++++++++++++++- > drivers/cpufreq/cppc_cpufreq.c | 207 ++++++++++++++++- > include/acpi/cppc_acpi.h | 40 ++++ > 4 files changed, 500 insertions(+), 5 deletions(-) > > [1] https://lore.kernel.org/lkml/20250211103737.447704-1-sumitg@nvidia.com/ > [2] https://lore.kernel.org/lkml/20250823200121.1320197-1-sumitg@nvidia.com/ > [3] https://lore.kernel.org/lkml/20251001150104.1275188-1-sumitg@nvidia.com/ > [4] https://lore.kernel.org/lkml/20251105113844.4086250-1-sumitg@nvidia.com/ > [5] https://lore.kernel.org/lkml/20251223121307.711773-1-sumitg@nvidia.com/ > [6] https://lore.kernel.org/lkml/20260120145623.2959636-1-sumitg@nvidia.com/ > [7] https://lore.kernel.org/lkml/66f58f43-631b-40a0-8d42-4e90cd24b757@arm.com/ >