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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acb6eefc72fsm809912366b.101.2025.04.23.06.01.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Apr 2025 06:01:10 -0700 (PDT) Message-ID: <6662b275-6b8e-40be-b62f-c17ae8e63dfa@oss.qualcomm.com> Date: Wed, 23 Apr 2025 15:01:07 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/9] Enable QUPs and Serial on SA8255p Qualcomm platforms To: Praveen Talari , Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Viresh Kumar , Nishanth Menon , Stephen Boyd , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org Cc: psodagud@quicinc.com, djaggi@quicinc.com, quic_msavaliy@quicinc.com, quic_vtanuku@quicinc.com, quic_arandive@quicinc.com, quic_mnaresh@quicinc.com, quic_shazhuss@quicinc.com References: <20250418151235.27787-1-quic_ptalari@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250418151235.27787-1-quic_ptalari@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: OlycTGwy4ggMjBxcL5Rwp3O3QUsW6uWX X-Authority-Analysis: v=2.4 cv=OY6YDgTY c=1 sm=1 tr=0 ts=6808e498 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=NEAV23lmAAAA:8 a=TM_zcG2lH5YfWnRg5aMA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-ORIG-GUID: OlycTGwy4ggMjBxcL5Rwp3O3QUsW6uWX X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDIzMDA5MSBTYWx0ZWRfX/7E7GbWl1HLd nmY+RMftVVMLXAlt60epB+fPXYnj87H/ydIgtjSTbkgrROlNgSIpbcZk2JtV53IyveVtGppjCWc WzOzfphel2N6AaGcSTt60eyvF4JxC+OuKqe8eZBmW04AKoFeF86sSoURXCGiaGT41t24xunAMjI EDYEK355Dicuv3V22lXEejuDezilZvBM1Ky2tfibMhMWXsJ2/qTIW1t6kcby5293q8htPE2FqHp +mhwcdTiUwwa6KND1Hpi9BtqqtKuT0aYXuzFAtIuqITKaUzMlcnKDiGB3oh/Y2pkgmpt+bbOXgG r6t+1d3nrXWuntmEhoMXoDlFPdj3HkPqPBKhvZxMZ1ouRDKLODOUSH2lbTqowDYWNBGorIPEOdU PguZpD48FEGe3Ttawzy3BPiJp/SqupDFYf2SFaZpZAy15jKCJv2rqlDeZVRCTPR/FTNPyYWN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.680,FMLib:17.12.80.40 definitions=2025-04-23_08,2025-04-22_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 clxscore=1015 malwarescore=0 mlxlogscore=928 phishscore=0 priorityscore=1501 spamscore=0 adultscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504230091 On 4/18/25 5:12 PM, Praveen Talari wrote: > The Qualcomm automotive SA8255p SoC relies on firmware to configure > platform resources, including clocks, interconnects and TLMM. The device > drivers request resources operations over SCMI using power and > performance protocols. > > The SCMI power protocol enables or disables resources like clocks, > interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs, > such as resume/suspend, to control power states(on/off). > > The SCMI performance protocol manages UART baud rates, with each baud > rate represented by a performance level. Drivers use the > dev_pm_opp_set_level() API to request the desired baud rate by > specifying the performance level. > > The QUP drivers are SCMI clients, with clocks, interconnects, pinctrl > and power-domains abstracted by a SCMI server. So I recently started working on abstracting away power controls from the SE protocol drivers into a single place, among other improvements A snapshot of this work is available here https://github.com/quic-kdybcio/linux/commits/topic/single_node_genise/ (not yet 100% ready..) I think it'd make sense to get it done first, so that we can condense most of your changes in the common driver, where we'd swap out the clock handling for perf level setting instead Konrad