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b=PvL3f3O2NBF6IXlhrG1JnmZLgNCHcbMUHAxztRiXS3PazD14Y8+WxAjk4WbjYUqH3JVTBKYvgRtmmNW6Wqly10BEI6OxT2ltdAiRWKPiZy2CKGPQZpIFzh5S4hDYK77rpJ+KihWsQCJORPzfOlMBHGk+en/LwCV58zXKvkyrI9I= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from MW3PR12MB4553.namprd12.prod.outlook.com (2603:10b6:303:2c::19) by MW4PR12MB6873.namprd12.prod.outlook.com (2603:10b6:303:20c::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7982.23; Mon, 23 Sep 2024 21:03:51 +0000 Received: from MW3PR12MB4553.namprd12.prod.outlook.com ([fe80::b0ef:2936:fec1:3a87]) by MW3PR12MB4553.namprd12.prod.outlook.com ([fe80::b0ef:2936:fec1:3a87%4]) with mapi id 15.20.7982.022; Mon, 23 Sep 2024 21:03:51 +0000 Message-ID: <666aa4ae-141f-4625-909a-d905e8f1c66d@amd.com> Date: Mon, 23 Sep 2024 16:03:46 -0500 User-Agent: Mozilla Thunderbird Reply-To: babu.moger@amd.com Subject: Re: [PATCH v7 15/24] x86/resctrl: Implement resctrl_arch_assign_cntr to assign a counter with ABMC To: Reinette Chatre , corbet@lwn.net, fenghua.yu@intel.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com Cc: x86@kernel.org, hpa@zytor.com, paulmck@kernel.org, rdunlap@infradead.org, tj@kernel.org, peterz@infradead.org, yanjiewtw@gmail.com, kim.phillips@amd.com, lukas.bulwahn@gmail.com, seanjc@google.com, jmattson@google.com, leitao@debian.org, jpoimboe@kernel.org, rick.p.edgecombe@intel.com, kirill.shutemov@linux.intel.com, jithu.joseph@intel.com, kai.huang@intel.com, kan.liang@linux.intel.com, daniel.sneddon@linux.intel.com, pbonzini@redhat.com, sandipan.das@amd.com, ilpo.jarvinen@linux.intel.com, peternewman@google.com, maciej.wieczor-retman@intel.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, eranian@google.com, james.morse@arm.com References: <2796f9514d9763d40dffbbfe651541d28bd4d995.1725488488.git.babu.moger@amd.com> <710c3d2c-ef18-4534-982c-a62761a09f96@intel.com> Content-Language: en-US From: "Moger, Babu" In-Reply-To: <710c3d2c-ef18-4534-982c-a62761a09f96@intel.com> Content-Type: text/plain; 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Sure. > > On 9/4/24 3:21 PM, Babu Moger wrote: >> +/* >> + * Send an IPI to the domain to assign the counter to RMID, event pair. >> + */ >> +int resctrl_arch_assign_cntr(struct rdt_resource *r, struct rdt_mon_domain *d, >> + enum resctrl_event_id evtid, u32 rmid, u32 closid, >> + u32 cntr_id, bool assign) > > Looking ahead this is also called when config of existing assigned counter is > changed. Should this thus perhaps be resctrl_arch_config_cntr()? We have a matching resctrl_arch_assign_cntr() and resctrl_arch_unassign_cntr() pair. If we change resctrl_arch_config_cntr() then we need to change resctrl_arch_unassign_cntr to resctrl_arch_unconfig_cntr(). Should we change both? > >> +{ >> + struct rdt_hw_mon_domain *hw_dom = resctrl_to_arch_mon_dom(d); >> + union l3_qos_abmc_cfg abmc_cfg = { 0 }; >> + struct arch_mbm_state *arch_mbm; >> + >> + abmc_cfg.split.cfg_en = 1; > > Just to confirm ... a counter remains "configured" from the hardware side whether it > is assigned from resctrl perspective or not? It seems to me that once a counter is > "unassigned" from resctrl perspective it needs no more context about that > counter, yet it remains configured from hardware side? That is correct. When unassigned, we are setting cntr_en = 0, so there is no counting. But in hardware perspective it is still configured. -- Thanks Babu Moger