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Wed, 14 Oct 2026 20:58:30 -0700 (PDT) X-Received: by 2002:a05:7022:e806:b0:178:4a98:8751 with SMTP id a92af1059eb24-1784ab70e5cmr12449972c88.37.1792036710046; Wed, 14 Oct 2026 20:58:30 -0700 (PDT) Received: from [10.218.14.97] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-35b29c2f861sm41853429eec.11.2026.10.14.20.58.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 14 Oct 2026 20:58:29 -0700 (PDT) Message-ID: <666e2768-28a8-4bb7-8c15-457ad20970a8@oss.qualcomm.com> Date: Thu, 15 Oct 2026 09:28:22 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/9] serial: qcom-geni: Use geni_se_set_rate() for source clock configuration To: Mukesh Savaliya , konrad.dybcio@oss.qualcomm.com, Sudeep Holla , Cristian Marussi , Ulf Hansson , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Jiri Slaby , Mark Brown , Viken Dadhaniya , Andi Shyti Cc: chandana.chiluveru@oss.qualcomm.com, arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-i2c@vger.kernel.org References: <20260827-derive_clk_perf_tbl_from_perf_domain_opp_table-v2-0-091697dbeb02@oss.qualcomm.com> <20260827-derive_clk_perf_tbl_from_perf_domain_opp_table-v2-5-091697dbeb02@oss.qualcomm.com> Content-Language: en-US From: Praveen Talari In-Reply-To: Content-Type: text/plain; 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>> +    int ret; >>   -    return port->dev_data->power_off ? >> -           port->dev_data->power_off(&port->se) : 0; >> +    ret = port->dev_data->power_off ? >> +          port->dev_data->power_off(&port->se) : 0; >> +    if (ret) >> +        return ret; >> + >> +    return geni_se_set_rate(&port->se, 0); > Is there any register access happening as part of this > geni_se_set_rate() ? i was searching but could not see after seeing > set_rate() callback removed.>   } No, there is no SE register access as part of geni_se_set_rate(), nor is there SE register access immediately after it. Thanks, Praveen Talari >>     static int __maybe_unused qcom_geni_serial_runtime_resume(struct >> device *dev) >>   { >>       struct qcom_geni_serial_port *port = dev_get_drvdata(dev); >> -    struct uart_port *uport = &port->uport; >>       int ret; >>         if (port->dev_data->power_on) { >> @@ -2056,8 +2062,8 @@ static int __maybe_unused >> qcom_geni_serial_runtime_resume(struct device *dev) >>               return ret; >>       } >>   -    if (port->se.has_opp && port->clk_rate) >> -        return dev_pm_opp_set_rate(uport->dev, port->clk_rate); >> +    if (port->clk_rate) >> +        return geni_se_set_rate(&port->se, port->clk_rate); >>         return 0; >>   } > [...]