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([2a01:e34:ed2f:f020:9880:a643:3e69:6393]) by smtp.googlemail.com with ESMTPSA id 22sm12746716wmb.11.2020.07.16.21.11.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Jul 2020 21:11:49 -0700 (PDT) Subject: Re: [PATCH v6 0/9] clocksource/drivers/timer-atmel-tcb: add sama5d2 support To: Alexandre Belloni Cc: Thomas Gleixner , Nicolas Ferre , Sebastian Andrzej Siewior , kamel.bouhara@bootlin.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20200710230813.1005150-1-alexandre.belloni@bootlin.com> From: Daniel Lezcano Message-ID: <6684b8d6-e3d2-ac2b-57d6-016e789ed5a7@linaro.org> Date: Fri, 17 Jul 2020 06:11:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200710230813.1005150-1-alexandre.belloni@bootlin.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/07/2020 01:08, Alexandre Belloni wrote: > Hello, > > This series mainly adds sama5d2 support where we need to avoid using > clock index 0 because that clock is never enabled by the driver. > > There is also a rework of the 32khz clock handling so it is not used for > clockevents on 32 bit counter because the increased rate improves the > resolution and doesn't have any drawback with that counter width. This > replaces a patch that has been carried in the linux-rt tree for a while. > > Changes in v6: > - Added final Rob's Reviewed by, based on: > https://lore.kernel.org/linux-arm-kernel/20200709210543.GA884561@bogus/ > - fixed the clockevent periodic rate Applied, thanks -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog