Re: [PATCH V2] arm64/mm: Convert __pte_to_phys() and __phys_to_pte_val() as functions

[Ryan Roberts <ryan.roberts@arm.com>]

On 27/02/2025 02:24, Anshuman Khandual wrote:
> When CONFIG_ARM64_PA_BITS_52 is enabled, page table helpers __pte_to_phys()
> and __phys_to_pte_val() are functions which return phys_addr_t and pteval_t
> respectively as expected. But otherwise without this config being enabled,
> they are defined as macros and their return types are implicit.
> 
> Until now this has worked out correctly as both pte_t and phys_addr_t data
> types have been 64 bits. But with the introduction of 128 bit page tables,
> pte_t becomes 128 bits. Hence this ends up with incorrect widths after the
> conversions, which leads to compiler warnings.
> 
> Fix these warnings by converting __pte_to_phys() and __phys_to_pte_val()
> as functions instead where the return types are handled explicitly.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>

Reviewed-by: Ryan Roberts <ryan.roberts@arm.com>

> ---
> This patch applies on v6.14-rc3
> 
> Changes in V2:
> 
> - Changed the helper macros as functions instead per Mark
> - Dropped irrelevant (now) in-code comments per Mark
> 
> Changes in V1:
> 
> https://lore.kernel.org/all/20250219035646.536707-1-anshuman.khandual@arm.com/
> 
>  arch/arm64/include/asm/pgtable.h | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> index 0b2a2ad1b9e8..4ebfa60ea5c6 100644
> --- a/arch/arm64/include/asm/pgtable.h
> +++ b/arch/arm64/include/asm/pgtable.h
> @@ -68,10 +68,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
>  #define pte_ERROR(e)	\
>  	pr_err("%s:%d: bad pte %016llx.\n", __FILE__, __LINE__, pte_val(e))
>  
> -/*
> - * Macros to convert between a physical address and its placement in a
> - * page table entry, taking care of 52-bit addresses.
> - */
>  #ifdef CONFIG_ARM64_PA_BITS_52
>  static inline phys_addr_t __pte_to_phys(pte_t pte)
>  {
> @@ -84,8 +80,15 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys)
>  	return (phys | (phys >> PTE_ADDR_HIGH_SHIFT)) & PHYS_TO_PTE_ADDR_MASK;
>  }
>  #else
> -#define __pte_to_phys(pte)	(pte_val(pte) & PTE_ADDR_LOW)
> -#define __phys_to_pte_val(phys)	(phys)
> +static inline phys_addr_t __pte_to_phys(pte_t pte)
> +{
> +	return pte_val(pte) & PTE_ADDR_LOW;
> +}
> +
> +static inline pteval_t __phys_to_pte_val(phys_addr_t phys)
> +{
> +	return phys;
> +}
>  #endif
>  
>  #define pte_pfn(pte)		(__pte_to_phys(pte) >> PAGE_SHIFT)