From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753782AbbIRNCw (ORCPT ); Fri, 18 Sep 2015 09:02:52 -0400 Received: from mail-pa0-f49.google.com ([209.85.220.49]:35774 "EHLO mail-pa0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753485AbbIRNCu convert rfc822-to-8bit (ORCPT ); Fri, 18 Sep 2015 09:02:50 -0400 Subject: Re: [PATCH v2] arm64: Introduce IRQ stack Mime-Version: 1.0 (Apple Message framework v1283) Content-Type: text/plain; charset=us-ascii From: Jungseok Lee In-Reply-To: <20150917170705.GQ25444@e104818-lin.cambridge.arm.com> Date: Fri, 18 Sep 2015 22:02:50 +0900 Cc: James Morse , Mark Rutland , Will Deacon , "linux-kernel@vger.kernel.org" , "takahiro.akashi@linaro.org" , "linux-arm-kernel@lists.infradead.org" Content-Transfer-Encoding: 8BIT Message-Id: <669F484A-EB71-4D14-B09F-4AD341631EF2@gmail.com> References: <1442155337-7020-1-git-send-email-jungseoklee85@gmail.com> <20150916112520.GH28771@arm.com> <55FA9708.5070200@arm.com> <8C4599C6-E5F8-4527-AAFF-9FEF295526BB@gmail.com> <20150917170705.GQ25444@e104818-lin.cambridge.arm.com> To: Catalin Marinas X-Mailer: Apple Mail (2.1283) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sep 18, 2015, at 2:07 AM, Catalin Marinas wrote: > On Thu, Sep 17, 2015 at 09:36:04PM +0900, Jungseok Lee wrote: >> On Sep 17, 2015, at 7:33 PM, James Morse wrote: >>> On 16/09/15 12:25, Will Deacon wrote: >>>> On Sun, Sep 13, 2015 at 03:42:17PM +0100, Jungseok Lee wrote: >>>>> diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h >>>>> index dcd06d1..44839c0 100644 >>>>> --- a/arch/arm64/include/asm/thread_info.h >>>>> +++ b/arch/arm64/include/asm/thread_info.h >>>>> @@ -73,8 +73,11 @@ static inline struct thread_info *current_thread_info(void) __attribute_const__; >>>>> >>>>> static inline struct thread_info *current_thread_info(void) >>>>> { >>>>> - return (struct thread_info *) >>>>> - (current_stack_pointer & ~(THREAD_SIZE - 1)); >>>>> + unsigned long sp_el0; >>>>> + >>>>> + asm volatile("mrs %0, sp_el0" : "=r" (sp_el0)); >>>>> + >>>>> + return (struct thread_info *)(sp_el0 & ~(THREAD_SIZE - 1)); >>>> >>>> This looks like it will generate worse code than our current implementation, >>>> thanks to the asm volatile. Maybe just add something like a global >>>> current_stack_pointer_el0? > [...] >> --- a/arch/arm64/include/asm/thread_info.h >> +++ b/arch/arm64/include/asm/thread_info.h >> @@ -77,7 +77,7 @@ static inline struct thread_info *current_thread_info(void) >> >> asm volatile("mrs %0, sp_el0" : "=r" (sp_el0)); >> >> - return (struct thread_info *)(sp_el0 & ~(THREAD_SIZE - 1)); >> + return (struct thread_info *)sp_el0; >> } > > This makes sense, since we just use sp_el0 as a scratch register, store > the current thread_info address directly. But, as James mentioned, I > don't think you need asm volatile, just asm (it has a small impact in my > tests). I will squash this change into the original one without volatile. Best Regards Jungseok Lee