From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752766AbcGMI34 (ORCPT ); Wed, 13 Jul 2016 04:29:56 -0400 Received: from mail-oi0-f67.google.com ([209.85.218.67]:36491 "EHLO mail-oi0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752565AbcGMI3m (ORCPT ); Wed, 13 Jul 2016 04:29:42 -0400 Subject: Re: [RFC PATCH 0/4] KVM: Emulate UMIP (or almost do so) To: Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org References: <1468351223-3250-1-git-send-email-pbonzini@redhat.com> From: Yang Zhang Message-ID: <66a39aa5-3e94-a5db-9682-e028cdd04226@gmail.com> Date: Wed, 13 Jul 2016 16:29:15 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1468351223-3250-1-git-send-email-pbonzini@redhat.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016/7/13 3:20, Paolo Bonzini wrote: > UMIP (User-Mode Instruction Prevention) is a feature of future > Intel processors (Cannonlake?) that blocks SLDT, SGDT, STR, SIDT I remember there is no Cannonlake any more. It should be Icelake. :) > and SMSW from user-mode processes. Do you know the background of this feature? For security or other purpose? > > The idea here is to use virtualization intercepts to emulate UMIP; it > slows down the instructions when they're executed in ring 0, but they > are really never executed in practice. On AMD systems it's possible > to emulate it entirely; instead on Intel systems it's *almost* possible > to emulate it, because SMSW doesn't cause a vmexit, and hence SMSW will > not fault. > > This patch series provides the infrastructure and implements it on > Intel. I tested it through kvm-unit-tests. > > Still I think the idea is interesting, even if it's buggy for current > Intel processors. Any opinions? > > Paolo > > Paolo Bonzini (4): > x86: add UMIP feature and CR4 bit > KVM: x86: emulate sldt and str > KVM: x86: add support for emulating UMIP > KVM: vmx: add support for emulating UMIP > > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/include/asm/kvm_host.h | 3 ++- > arch/x86/include/asm/vmx.h | 1 + > arch/x86/include/uapi/asm/processor-flags.h | 2 ++ > arch/x86/include/uapi/asm/vmx.h | 4 +++ > arch/x86/kvm/cpuid.c | 5 +++- > arch/x86/kvm/cpuid.h | 8 ++++++ > arch/x86/kvm/emulate.c | 40 ++++++++++++++++++++++++----- > arch/x86/kvm/svm.c | 6 +++++ > arch/x86/kvm/vmx.c | 40 ++++++++++++++++++++++++++++- > arch/x86/kvm/x86.c | 3 +++ > 11 files changed, 104 insertions(+), 9 deletions(-) > -- Yang Alibaba Cloud Computing