From: Vasant Hegde <vasant.hegde@amd.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, jgg@nvidia.com
Cc: yi.l.liu@intel.com, kevin.tian@intel.com, nicolinc@nvidia.com,
jon.grimm@amd.com, santosh.shukla@amd.com, Sairaj.K@amd.com,
jay.chen@amd.com, Ming.Shu@amd.com, SooJin.Tan@amd.com,
chrisl@kernel.org, wvw@google.com, wnliu@google.com,
dantuluris@google.com, kpsingh@google.com,
alejandro.j.jimenez@oracle.com, joao.m.martins@oracle.com,
guanghuifeng@linux.alibaba.com
Subject: Re: [PATCH v6 24/24] iommu/amd: Relocate vIOMMU translate-device-id on PCI reserve
Date: Wed, 21 Oct 2026 15:39:20 +0530 [thread overview]
Message-ID: <66a43b7c-42bc-4f87-a26d-66cef6f24812@amd.com> (raw)
In-Reply-To: <20260930092344.5616-25-suravee.suthikulpanit@amd.com>
On 9/30/2026 2:53 PM, Suravee Suthikulpanit wrote:
> When PCI probe reserves a BDF already allocated to a vIOMMU, relocate
> that vIOMMU to a newly allocated translate-device-id before marking the
> BDF reserved for the device. Reserve holds the segment mutex and
> trylocks trans_devid_lock so the vIOMMU pointer stays valid without
> reversing the nested lock order. Reprogram translation DTE and VFctrl
> under trans_devid_lock; roll back the pool on failure.
>
> Mark from_id reserved with a raw xa_store so ALLOCATED->RESERVED does
> not WARN on the non-NULL owner. On MMIO failure, restore from_id the
> same way (RESERVED->owner) instead of install_allocated.
>
> Reuse the vIOMMU's trans_dev_data object. After programming the new
> slot, clear the old DTE without freeing the object.
>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
> drivers/iommu/amd/amd_iommu_types.h | 10 +-
> drivers/iommu/amd/trans_devid.c | 146 +++++++++++++++++++++++++++-
> 2 files changed, 152 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
> index c748bab27509..347c6954439d 100644
> --- a/drivers/iommu/amd/amd_iommu_types.h
> +++ b/drivers/iommu/amd/amd_iommu_types.h
> @@ -558,11 +558,15 @@ struct amd_iommu_viommu {
>
.../...
>
> + aviommu = trans_devid_xa_owner(entry);
> + if (aviommu) {
> + /*
> + * Pin aviommu with trylock while the mutex still covers
> + * the xarray pointer. A blocking lock here would invert
> + * the nested order (ABBA with destroy). Dropping the
> + * mutex first would UAF if destroy frees aviommu.
> + *
> + * No retry bound. cond_resched() avoids a soft lockup;
> + * progress is this owner dropping trans_devid_lock or
> + * freeing the slot.
> + */
> + if (!mutex_trylock(&aviommu->trans_devid_lock)) {
> + mutex_unlock(&pci_seg->trans_devid_mutex);
> + cond_resched();
> + goto retry;
> + }
AI comment (looks genuine, hence copy-pasting as is)
This is an unbounded trylock/retry loop in amd_iommu_probe_device(),
which runs under iommu_probe_device_lock. Would a single per-segment
mutex covering both the pool and TransDevID/DTE programming remove the
lock ordering problem, and with it the trylock? vIOMMU create and
destroy are not hot paths.
The reservation also runs too late in probe. amd_iommu_probe_device()
calls iommu_init_device() first, which goes through setup_aliases() ->
clone_aliases() -> clone_alias(). clone_alias() reads the device's own
DTE and copies it into every alias slot. Only afterwards does
amd_iommu_trans_devid_reserve() run and relocate a vIOMMU that owns one
of these RIDs. Two cases look wrong:
- The device's own RID is a live translate slot. The VM's translate
DTE (GPA->SPA) is cloned into the alias slots, and the aliases keep
pointing at the VM's address space until the default domain is
attached.
- An alias RID is a live translate slot. find_dev_data() creates a
host dev_data for it and clone_alias() overwrites the VM's
translate DTE under the new dev_data's dte_lock, not
trans_dev_data->dte_lock. Relocation then clears old_id, which
wipes the alias DTE the host just wrote.
Shouldn't the reservation (and any relocation) complete before
iommu_init_device()?
-Vasant
next prev parent reply other threads:[~2026-10-21 10:09 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 9:23 [PATCH v6 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-09-30 9:23 ` [PATCH v6 01/24] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-09-30 9:23 ` [PATCH v6 02/24] iommu/amd: Introduce EVENT_TYPE_GUEST_EVENT_FAULT Suravee Suthikulpanit
2026-10-19 6:10 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 03/24] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-10-19 6:40 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 04/24] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-09-30 21:44 ` Nicolin Chen
2026-09-30 9:23 ` [PATCH v6 05/24] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-10-19 11:15 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 06/24] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-10-19 11:28 ` Vasant Hegde
2026-10-19 17:06 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 07/24] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-10-19 11:38 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 08/24] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-09-30 9:23 ` [PATCH v6 09/24] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-10-19 14:06 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 10/24] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-10-19 17:14 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 11/24] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-09-30 9:23 ` [PATCH v6 12/24] iommu/amd: Store per-segment iommu_dev_data in an xarray Suravee Suthikulpanit
2026-10-19 13:39 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 13/24] iommu/amd: Program IOMMU DTE with the private IPA domain Suravee Suthikulpanit
2026-10-19 16:58 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 14/24] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-09-30 9:23 ` [PATCH v6 15/24] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-09-30 9:23 ` [PATCH v6 16/24] iommu/amd: Add IOMMUFD vDevice and DevID mapping Suravee Suthikulpanit
2026-10-15 23:39 ` Jason Gunthorpe
2026-10-21 5:15 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 17/24] iommu/amd: Program nested DTE and DomID map on attach Suravee Suthikulpanit
2026-10-15 23:39 ` Jason Gunthorpe
2026-10-21 5:26 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 18/24] iommu/amd: Init and clear vIOMMU DevID and DomID maps Suravee Suthikulpanit
2026-10-15 23:39 ` Jason Gunthorpe
2026-10-20 16:00 ` Suthikulpanit, Suravee
2026-10-20 16:50 ` Jason Gunthorpe
2026-10-21 5:28 ` Suthikulpanit, Suravee
2026-10-21 5:29 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 19/24] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-09-30 9:23 ` [PATCH v6 20/24] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-09-30 9:23 ` [PATCH v6 21/24] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-10-21 6:15 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 22/24] iommu/amd: Add translate-device-id alloc/free with vIOMMU owner Suravee Suthikulpanit
2026-10-21 6:33 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 23/24] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-10-21 10:06 ` Vasant Hegde
2026-09-30 9:23 ` [PATCH v6 24/24] iommu/amd: Relocate vIOMMU translate-device-id on PCI reserve Suravee Suthikulpanit
2026-10-21 10:09 ` Vasant Hegde [this message]
2026-10-15 12:33 ` [PATCH v6 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Guixin Liu
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