Re: [PATCH bpf-next v4 0/3] riscv, bpf: Add support for signed operations and 32-bit atomics

[Pu Lehui <pulehui@huawei.com>]

On 2026/7/14 8:24, Kuan-Wei Chiu wrote:
> Add support for missing signed operations and 32-bit atomics in the
> RV32 BPF JIT compiler.
> 
> The current implementation lacks support for BPF_SDIV, BPF_SMOD, and
> BPF_MOVSX, ignoring the instruction offset field and treating them as
> unsigned or zero-extended. Introduce support for these operations by
> checking the offset field and emitting the corresponding instructions.
> 
> Additionally, we leverage the mandatory A extension to natively support
> 32-bit BPF atomics (and, or, xor, xchg) by mapping them directly to
> amo*.w instructions. BPF_CMPXCHG continues to fall back to the
> interpreter.
> 
> As a result, test_bpf.ko now runs with 0 failures, and the total number
> of successfully JIT'ed test cases increases from 843 to 902.
> ---
> Changes in v4:
> - Add a 'dst' param to emit_bpf_atomic().
> 
> Changes in v3:
> - Pass insn directly to emit_alu_r32().
> - Remove the Fixes: tag and update title.
> - Consolidate size, mode, and off into insn for emit_store_r64().
> 
> Changes in v2:
> - Add missing Fixes tags.
> - Fix memory ordering by emitting aq=1, rl=1
> 
> Kuan-Wei Chiu (3):
>    riscv, bpf: Add support for BPF_SDIV and BPF_SMOD in RV32 JIT
>    riscv, bpf: Add support for BPF_MOVSX in RV32 JIT
>    riscv, bpf: Add 32 bit atomic operations to RV32 JIT
> 
>   arch/riscv/net/bpf_jit_comp32.c | 111 +++++++++++++++++++++++++++-----
>   1 file changed, 95 insertions(+), 16 deletions(-)
> 

before:
test_bpf: Summary: 846 PASSED, 216 FAILED, [847/847 JIT'ed]

after:
test_bpf: Summary: 918 PASSED, 144 FAILED, [906/906 JIT'ed]


Tested-by: Pu Lehui <pulehui@huawei.com>