From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 874584D90A6 for ; Wed, 22 Jul 2026 15:46:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784735199; cv=none; b=o8s75tVFTTUDjuSEDJ+GNQQWJU8ONDAXv0ClMOoqca4H7o7ldHsKQ+lh488SLDlbyyaZGp22FQYZ7LYHUcZ1knG6EOafodXO5Wgj3C0g/7PFhxMhxU8cFg8pdMS9aSnEUFY/K82g8X1ED6th6J3CR1WfH7Cq6p7BFGO0ynlvlSI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784735199; c=relaxed/simple; bh=MZgA7h5tqq1ohLrBLwxP5Ga7b75ZmhKyXcpJh/q7pq4=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=e2g539ZdMkCkMHHQMZG2Zto8LtdkGRMgyBLGCYKohYDVqESdM7DlKKHHD/k/9YBkW5Nt9SPWsebPt204HJys9W19xEYBD5USnhjaIOGzUMn/0+EDwTJDBEtU/4dfdIG7rh1F8aAfTjtUySXQr5gpArbAR1z4t64Xnw8pHqt295Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wmZ9S-000000006er-2bjZ; Wed, 22 Jul 2026 15:46:30 +0000 Date: Wed, 22 Jul 2026 16:46:27 +0100 From: Daniel Golle To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Matthias Brugger , AngeloGioacchino Del Regno , Hermes Wu , Allen Chen , Pin-yen Lin , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Cc: Chen-Yu Tsai Subject: [PATCH v5 06/11] drm/bridge: it6505: avoid division by zero in pixel clock calculation Message-ID: <66fbe7f9cb0efe2fb4b66dc4a4a632d46398eca8.1784717129.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: it6505_calc_video_info() checks the sum of the three pixel clock counter samples for zero before dividing it by 3, so sums of 1 or 2 truncate to 0 and the following pixel clock calculation divides by zero. Divide first and check the result. Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver") Signed-off-by: Daniel Golle --- v5: new patch drivers/gpu/drm/bridge/ite-it6505.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c index 0e141310ed3c..fc95f8d4f412 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -750,12 +750,13 @@ static void it6505_calc_video_info(struct it6505 *it6505) sum += rddata; } + sum /= 3; + if (sum == 0) { DRM_DEV_DEBUG_DRIVER(dev, "calc video timing error"); return; } - sum /= 3; pclk = 13500 * 2048 / sum; it6505->video_info.clock = pclk; it6505->video_info.hdisplay = hdew; -- 2.55.0