From: Andre Przywara <andre.przywara@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, will.deacon@arm.com,
catalin.marinas@arm.com, marc.zyngier@arm.com,
mark.rutland@arm.com, james.morse@arm.com,
ard.biesheuvel@linaro.org
Subject: Re: [PATCH v3 2/9] arm64: Use consistent naming for errata handling
Date: Wed, 7 Sep 2016 11:36:37 +0100 [thread overview]
Message-ID: <67318cf8-36fd-bc0a-e15e-21c30d01dccf@arm.com> (raw)
In-Reply-To: <1473069509-2317-3-git-send-email-suzuki.poulose@arm.com>
Hi,
On 05/09/16 10:58, Suzuki K Poulose wrote:
> This is a cosmetic change to rename the functions dealing with
> the errata work arounds to be more consistent with their naming.
>
> 1) check_local_cpu_errata() => update_cpu_errata_workarounds()
> check_local_cpu_errata() actually updates the system's errata work
> arounds. So rename it to reflect the same.
Which was a pretty obvious misnomer as its only action is to call
update_cpu_capabilities() ;-)
>
> 2) verify_local_cpu_errata() => verify_local_cpu_errata_workarounds()
> Use errata_workarounds instead of _errata.
Yes, this makes sense.
Acked-by: Andre Przywara <andre.przywara@arm.com>
Thanks!
Andre.
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Andre Przywara <andre.przywara@arm.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> arch/arm64/include/asm/cpufeature.h | 4 ++--
> arch/arm64/kernel/cpu_errata.c | 4 ++--
> arch/arm64/kernel/cpufeature.c | 2 +-
> arch/arm64/kernel/cpuinfo.c | 2 +-
> 4 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index df47969..8289295 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -194,10 +194,10 @@ void __init setup_cpu_features(void);
> void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
> const char *info);
> void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
> -void check_local_cpu_errata(void);
> +void update_cpu_errata_workarounds(void);
> void __init enable_errata_workarounds(void);
>
> -void verify_local_cpu_errata(void);
> +void verify_local_cpu_errata_workarounds(void);
> void verify_local_cpu_capabilities(void);
>
> u64 read_system_reg(u32 id);
> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
> index 82b0fc2..5836b3d 100644
> --- a/arch/arm64/kernel/cpu_errata.c
> +++ b/arch/arm64/kernel/cpu_errata.c
> @@ -116,7 +116,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
> * and the related information is freed soon after. If the new CPU requires
> * an errata not detected at boot, fail this CPU.
> */
> -void verify_local_cpu_errata(void)
> +void verify_local_cpu_errata_workarounds(void)
> {
> const struct arm64_cpu_capabilities *caps = arm64_errata;
>
> @@ -131,7 +131,7 @@ void verify_local_cpu_errata(void)
> }
> }
>
> -void check_local_cpu_errata(void)
> +void update_cpu_errata_workarounds(void)
> {
> update_cpu_capabilities(arm64_errata, "enabling workaround for");
> }
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 4a19138d..643c856 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -1018,7 +1018,7 @@ void verify_local_cpu_capabilities(void)
> if (!sys_caps_initialised)
> return;
>
> - verify_local_cpu_errata();
> + verify_local_cpu_errata_workarounds();
> verify_local_cpu_features(arm64_features);
> verify_local_elf_hwcaps(arm64_elf_hwcaps);
> if (system_supports_32bit_el0())
> diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
> index ed1b84f..4fa7b73 100644
> --- a/arch/arm64/kernel/cpuinfo.c
> +++ b/arch/arm64/kernel/cpuinfo.c
> @@ -364,7 +364,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
>
> cpuinfo_detect_icache_policy(info);
>
> - check_local_cpu_errata();
> + update_cpu_errata_workarounds();
> }
>
> void cpuinfo_store_cpu(void)
>
next prev parent reply other threads:[~2016-09-07 10:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-05 9:58 [PATCH v3 0/9] arm64: Work around for mismatched cache line size Suzuki K Poulose
2016-09-05 9:58 ` [PATCH v3 1/9] arm64: Set the safe value for L1 icache policy Suzuki K Poulose
2016-09-05 9:58 ` [PATCH v3 2/9] arm64: Use consistent naming for errata handling Suzuki K Poulose
2016-09-07 10:36 ` Andre Przywara [this message]
2016-09-05 9:58 ` [PATCH v3 3/9] arm64: Rearrange CPU errata workaround checks Suzuki K Poulose
2016-09-05 9:58 ` [PATCH v3 4/9] arm64: alternative: Disallow patching instructions using literals Suzuki K Poulose
2016-09-05 9:58 ` [PATCH v3 5/9] arm64: insn: Add helpers for adrp offsets Suzuki K Poulose
2016-09-05 9:58 ` [PATCH v3 6/9] arm64: alternative: Add support for patching adrp instructions Suzuki K Poulose
2016-09-05 9:58 ` [PATCH v3 7/9] arm64: Introduce raw_{d,i}cache_line_size Suzuki K Poulose
2016-09-05 9:58 ` [PATCH v3 8/9] arm64: Refactor sysinstr exception handling Suzuki K Poulose
2016-09-07 8:44 ` Will Deacon
2016-09-07 11:29 ` Andre Przywara
2016-09-05 9:58 ` [PATCH v3 9/9] arm64: Work around systems with mismatched cache line sizes Suzuki K Poulose
2016-09-05 10:10 ` Ard Biesheuvel
2016-09-05 10:24 ` Suzuki K Poulose
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