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Mon, 29 Jan 2024 08:44:06 -0800 (PST) Received: from [192.168.2.107] ([79.115.63.202]) by smtp.gmail.com with ESMTPSA id ci11-20020a170906c34b00b00a2f181266f6sm4157001ejb.148.2024.01.29.08.44.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Jan 2024 08:44:06 -0800 (PST) Message-ID: <673661cf-879d-45fe-979d-8650685f8b71@linaro.org> Date: Mon, 29 Jan 2024 16:44:04 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/5] clk: samsung: gs101: don't mark non-essential clocks as critical Content-Language: en-US To: =?UTF-8?Q?Andr=C3=A9_Draszik?= , peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, kernel-team@android.com, willmcvicker@google.com, semen.protsenko@linaro.org, alim.akhtar@samsung.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, mturquette@baylibre.com, sboyd@kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org References: <20240127003607.501086-1-andre.draszik@linaro.org> <20240127003607.501086-6-andre.draszik@linaro.org> From: Tudor Ambarus In-Reply-To: <20240127003607.501086-6-andre.draszik@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 1/27/24 00:35, André Draszik wrote: > The peric0_top1_ipclk_0 and peric0_top1_pclk_0 are the clocks going to > peric0/uart_usi, with pclk being the bus clock. Without pclk running, > any bus access will hang. > Unfortunately, in commit d97b6c902a40 ("arm64: dts: exynos: gs101: > update USI UART to use peric0 clocks") the gs101 DT ended up specifying > an incorrect pclkk in the respective node and instead the two clocks > here were marked as critical. > > We have fixed the gs101 DT and can therefore drop this incorrect > work-around here, the uart driver will claim these clocks as needed. > > Note that this commit has the side-effect of causing earlycon to stop > to work sometime into the boot for two reasons: > * peric0_top1_ipclk_0 requires its parent gout_cmu_peric0_ip to be > running, but because earlycon doesn't deal with clocks that > parent will be disabled when none of the other drivers that > actually deal with clocks correctly require it to be running and > the real serial driver (which does deal with clocks) hasn't taken > over yet > * hand-over between earlycon and serial driver appears to be > fragile and clocks get enabled and disabled a few times, which > also causes register access to hang while earlycon is still > active > Nonetheless we shouldn't keep these clocks running unconditionally just > for earlycon. Clocks should be disabled where possible. If earlycon is > required in the future, e.g. for debug, this commit can simply be > reverted (locally!). > > Fixes: 893f133a040b ("clk: samsung: gs101: add support for cmu_peric0") > Signed-off-by: André Draszik I find the logic fine: Reviewed-by: Tudor Ambarus > --- > drivers/clk/samsung/clk-gs101.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/samsung/clk-gs101.c b/drivers/clk/samsung/clk-gs101.c > index 61bb0dcf84ee..5c338ac9231c 100644 > --- a/drivers/clk/samsung/clk-gs101.c > +++ b/drivers/clk/samsung/clk-gs101.c > @@ -2982,20 +2982,18 @@ static const struct samsung_gate_clock peric0_gate_clks[] __initconst = { > "gout_peric0_peric0_top0_pclk_9", "mout_peric0_bus_user", > CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_9, > 21, 0, 0), > - /* Disabling this clock makes the system hang. Mark the clock as critical. */ > GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0, > "gout_peric0_peric0_top1_ipclk_0", "dout_peric0_usi0_uart", > CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_IPCLK_0, > - 21, CLK_IS_CRITICAL, 0), > + 21, 0, 0), > GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2, > "gout_peric0_peric0_top1_ipclk_2", "dout_peric0_usi14_usi", > CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_IPCLK_2, > 21, 0, 0), > - /* Disabling this clock makes the system hang. Mark the clock as critical. */ > GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0, > "gout_peric0_peric0_top1_pclk_0", "mout_peric0_bus_user", > CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_PCLK_0, > - 21, CLK_IS_CRITICAL, 0), > + 21, 0, 0), > GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2, > "gout_peric0_peric0_top1_pclk_2", "mout_peric0_bus_user", > CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_PCLK_2,