On Fri, 18 Aug 2023, Deucher, Alexander wrote: > [Public] > > > -----Original Message----- > > From: Ilpo Järvinen > > Sent: Monday, July 17, 2023 8:05 AM > > To: linux-pci@vger.kernel.org; Bjorn Helgaas ; Lorenzo > > Pieralisi ; Rob Herring ; > > Krzysztof Wilczyński ; Emmanuel Grumbach > > ; Rafael J . Wysocki ; > > Heiner Kallweit ; Lukas Wunner ; > > Andy Shevchenko ; Deucher, Alexander > > ; Koenig, Christian > > ; Pan, Xinhui ; David > > Airlie ; Daniel Vetter ; amd- > > gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux- > > kernel@vger.kernel.org > > Cc: Dean Luick ; Jonas Dreßler > > ; Ilpo Järvinen ; > > stable@vger.kernel.org > > Subject: [PATCH v5 06/11] drm/radeon: Use RMW accessors for changing > > LNKCTL > > > > Don't assume that only the driver would be accessing LNKCTL. ASPM policy > > changes can trigger write to LNKCTL outside of driver's control. > > And in the case of upstream bridge, the driver does not even own the device > > it's changing the registers for. > > > > Use RMW capability accessors which do proper locking to avoid losing > > concurrent updates to the register value. > > > > Fixes: 8a7cd27679d0 ("drm/radeon/cik: add support for pcie gen1/2/3 > > switching") > > Fixes: b9d305dfb66c ("drm/radeon: implement pcie gen2/3 support for SI") > > Suggested-by: Lukas Wunner > > Signed-off-by: Ilpo Järvinen > > Cc: stable@vger.kernel.org > > For this and the amdgpu patch: > Acked-by: Alex Deucher > I'm not sure if this is stable material however. Is there some issue today? These were added without Cc stable into pci.git/pcie-rmw. -- i.