From: Waiman Long <longman@redhat.com>
To: Will Deacon <will.deacon@arm.com>, linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org, peterz@infradead.org,
mingo@kernel.org, boqun.feng@gmail.com,
paulmck@linux.vnet.ibm.com
Subject: Re: [PATCH v2 04/13] locking/qspinlock: Remove unbounded cmpxchg loop from locking slowpath
Date: Wed, 11 Apr 2018 15:34:25 -0400 [thread overview]
Message-ID: <674fd9c0-e3f3-9ae0-dd0a-7ccc085c1706@redhat.com> (raw)
In-Reply-To: <1523469680-17699-5-git-send-email-will.deacon@arm.com>
On 04/11/2018 02:01 PM, Will Deacon wrote:
> The qspinlock locking slowpath utilises a "pending" bit as a simple form
> of an embedded test-and-set lock that can avoid the overhead of explicit
> queuing in cases where the lock is held but uncontended. This bit is
> managed using a cmpxchg loop which tries to transition the uncontended
> lock word from (0,0,0) -> (0,0,1) or (0,0,1) -> (0,1,1).
>
> Unfortunately, the cmpxchg loop is unbounded and lockers can be starved
> indefinitely if the lock word is seen to oscillate between unlocked
> (0,0,0) and locked (0,0,1). This could happen if concurrent lockers are
> able to take the lock in the cmpxchg loop without queuing and pass it
> around amongst themselves.
>
> This patch fixes the problem by unconditionally setting _Q_PENDING_VAL
> using atomic_fetch_or, and then inspecting the old value to see whether
> we need to spin on the current lock owner, or whether we now effectively
> hold the lock. The tricky scenario is when concurrent lockers end up
> queuing on the lock and the lock becomes available, causing us to see
> a lockword of (n,0,0). With pending now set, simply queuing could lead
> to deadlock as the head of the queue may not have observed the pending
> flag being cleared. Conversely, if the head of the queue did observe
> pending being cleared, then it could transition the lock from (n,0,0) ->
> (0,0,1) meaning that any attempt to "undo" our setting of the pending
> bit could race with a concurrent locker trying to set it.
>
> We handle this race by preserving the pending bit when taking the lock
> after reaching the head of the queue and leaving the tail entry intact
> if we saw pending set, because we know that the tail is going to be
> updated shortly.
>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Ingo Molnar <mingo@kernel.org>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
> kernel/locking/qspinlock.c | 102 ++++++++++++++++++++++++++-------------------
> 1 file changed, 58 insertions(+), 44 deletions(-)
>
> diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
> index 396701e8c62d..a8fc402b3f3a 100644
> --- a/kernel/locking/qspinlock.c
> +++ b/kernel/locking/qspinlock.c
> @@ -162,6 +162,17 @@ struct __qspinlock {
>
> #if _Q_PENDING_BITS == 8
> /**
> + * clear_pending - clear the pending bit.
> + * @lock: Pointer to queued spinlock structure
> + *
> + * *,1,* -> *,0,*
> + */
> +static __always_inline void clear_pending(struct qspinlock *lock)
> +{
> + WRITE_ONCE(lock->pending, 0);
> +}
> +
> +/**
> * clear_pending_set_locked - take ownership and clear the pending bit.
> * @lock: Pointer to queued spinlock structure
> *
> @@ -201,6 +212,17 @@ static __always_inline u32 xchg_tail(struct qspinlock *lock, u32 tail)
> #else /* _Q_PENDING_BITS == 8 */
>
> /**
> + * clear_pending - clear the pending bit.
> + * @lock: Pointer to queued spinlock structure
> + *
> + * *,1,* -> *,0,*
> + */
> +static __always_inline void clear_pending(struct qspinlock *lock)
> +{
> + atomic_andnot(_Q_PENDING_VAL, &lock->val);
> +}
> +
> +/**
> * clear_pending_set_locked - take ownership and clear the pending bit.
> * @lock: Pointer to queued spinlock structure
> *
> @@ -306,7 +328,7 @@ static __always_inline u32 __pv_wait_head_or_lock(struct qspinlock *lock,
> void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
> {
> struct mcs_spinlock *prev, *next, *node;
> - u32 new, old, tail;
> + u32 old, tail;
> int idx;
>
> BUILD_BUG_ON(CONFIG_NR_CPUS >= (1U << _Q_TAIL_CPU_BITS));
> @@ -330,58 +352,50 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
> }
>
> /*
> + * If we observe any contention; queue.
> + */
> + if (val & ~_Q_LOCKED_MASK)
> + goto queue;
> +
> + /*
> * trylock || pending
> *
> * 0,0,0 -> 0,0,1 ; trylock
> * 0,0,1 -> 0,1,1 ; pending
> */
> - for (;;) {
> + val = atomic_fetch_or_acquire(_Q_PENDING_VAL, &lock->val);
> + if (!(val & ~_Q_LOCKED_MASK)) {
> /*
> - * If we observe any contention; queue.
> + * we're pending, wait for the owner to go away.
> + *
> + * *,1,1 -> *,1,0
> + *
> + * this wait loop must be a load-acquire such that we match the
> + * store-release that clears the locked bit and create lock
> + * sequentiality; this is because not all
> + * clear_pending_set_locked() implementations imply full
> + * barriers.
> */
> - if (val & ~_Q_LOCKED_MASK)
> - goto queue;
> -
> - new = _Q_LOCKED_VAL;
> - if (val == new)
> - new |= _Q_PENDING_VAL;
> + if (val & _Q_LOCKED_MASK) {
> + smp_cond_load_acquire(&lock->val.counter,
> + !(VAL & _Q_LOCKED_MASK));
> + }
>
> /*
> - * Acquire semantic is required here as the function may
> - * return immediately if the lock was free.
> + * take ownership and clear the pending bit.
> + *
> + * *,1,0 -> *,0,1
> */
> - old = atomic_cmpxchg_acquire(&lock->val, val, new);
> - if (old == val)
> - break;
> -
> - val = old;
> - }
> -
> - /*
> - * we won the trylock
> - */
> - if (new == _Q_LOCKED_VAL)
> + clear_pending_set_locked(lock);
> return;
> + }
>
> /*
> - * we're pending, wait for the owner to go away.
> - *
> - * *,1,1 -> *,1,0
> - *
> - * this wait loop must be a load-acquire such that we match the
> - * store-release that clears the locked bit and create lock
> - * sequentiality; this is because not all clear_pending_set_locked()
> - * implementations imply full barriers.
> - */
> - smp_cond_load_acquire(&lock->val.counter, !(VAL & _Q_LOCKED_MASK));
> -
> - /*
> - * take ownership and clear the pending bit.
> - *
> - * *,1,0 -> *,0,1
> + * If pending was clear but there are waiters in the queue, then
> + * we need to undo our setting of pending before we queue ourselves.
> */
> - clear_pending_set_locked(lock);
> - return;
> + if (!(val & _Q_PENDING_MASK))
> + clear_pending(lock);
>
> /*
> * End of pending bit optimistic spinning and beginning of MCS
> @@ -485,15 +499,15 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
> * claim the lock:
> *
> * n,0,0 -> 0,0,1 : lock, uncontended
> - * *,0,0 -> *,0,1 : lock, contended
> + * *,*,0 -> *,*,1 : lock, contended
> *
> - * If the queue head is the only one in the queue (lock value == tail),
> - * clear the tail code and grab the lock. Otherwise, we only need
> - * to grab the lock.
> + * If the queue head is the only one in the queue (lock value == tail)
> + * and nobody is pending, clear the tail code and grab the lock.
> + * Otherwise, we only need to grab the lock.
> */
> for (;;) {
> /* In the PV case we might already have _Q_LOCKED_VAL set */
> - if ((val & _Q_TAIL_MASK) != tail) {
> + if ((val & _Q_TAIL_MASK) != tail || (val & _Q_PENDING_MASK)) {
> set_locked(lock);
> break;
> }
I don't think it is right to just grab the lock when the pending bit is
set. I believe it will cause problem.
Preserving the the pending bit should be just
diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
index 35367cc..76d9124 100644
--- a/kernel/locking/qspinlock.c
+++ b/kernel/locking/qspinlock.c
@@ -511,7 +511,8 @@ void queued_spin_lock_slowpath(struct qspinlock
*lock, u32 v
* necessary acquire semantics required for locking. At most
* two iterations of this loop may be ran.
*/
- old = atomic_cmpxchg_relaxed(&lock->val, val,
_Q_LOCKED_VAL);
+ old = atomic_cmpxchg_relaxed(&lock->val, val,
+ _Q_LOCKED_VAL | (val & _Q_PENDING_MASK));
if (old == val)
goto release; /* No contention */
Cheers,
Longman
next prev parent reply other threads:[~2018-04-11 19:34 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-11 18:01 [PATCH v2 00/13] kernel/locking: qspinlock improvements Will Deacon
2018-04-11 18:01 ` [PATCH v2 01/13] barriers: Introduce smp_cond_load_relaxed and atomic_cond_read_relaxed Will Deacon
2018-04-11 18:01 ` [PATCH v2 02/13] locking/qspinlock: Bound spinning on pending->locked transition in slowpath Will Deacon
2018-04-11 18:01 ` [PATCH v2 03/13] locking/qspinlock/x86: Increase _Q_PENDING_LOOPS upper bound Will Deacon
2018-04-11 18:01 ` [PATCH v2 04/13] locking/qspinlock: Remove unbounded cmpxchg loop from locking slowpath Will Deacon
2018-04-11 19:34 ` Waiman Long [this message]
2018-04-11 20:35 ` Waiman Long
2018-04-11 19:53 ` Waiman Long
2018-04-12 14:06 ` Will Deacon
2018-04-12 14:16 ` Waiman Long
2018-04-12 14:18 ` Will Deacon
2018-04-11 18:01 ` [PATCH v2 05/13] locking/qspinlock: Kill cmpxchg loop when claiming lock from head of queue Will Deacon
2018-04-11 18:01 ` [PATCH v2 06/13] locking/qspinlock: Use atomic_cond_read_acquire Will Deacon
2018-04-11 18:01 ` [PATCH v2 07/13] locking/mcs: Use smp_cond_load_acquire() in mcs spin loop Will Deacon
2018-04-11 18:01 ` [PATCH v2 08/13] locking/qspinlock: Use smp_cond_load_relaxed to wait for next node Will Deacon
2018-04-11 18:01 ` [PATCH v2 09/13] locking/qspinlock: Merge struct __qspinlock into struct qspinlock Will Deacon
2018-04-11 19:13 ` Waiman Long
2018-04-11 18:01 ` [PATCH v2 10/13] locking/qspinlock: Make queued_spin_unlock use smp_store_release Will Deacon
2018-04-11 18:01 ` [PATCH v2 11/13] locking/qspinlock: Elide back-to-back RELEASE operations with smp_wmb() Will Deacon
2018-04-11 18:01 ` [PATCH v2 12/13] locking/qspinlock: Use try_cmpxchg instead of cmpxchg when locking Will Deacon
2018-04-11 18:01 ` [PATCH v2 13/13] locking/qspinlock: Add stat tracking for pending vs slowpath Will Deacon
2018-04-13 9:24 ` [PATCH v2 00/13] kernel/locking: qspinlock improvements Catalin Marinas
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