Re: [PATCH v4] GPIO: add support for 74x164 serial-in/parallel-out 8-bit shift register

[David Brownell <david-b@pacbell.net>]

--- On Wed, 9/1/10, Florian Fainelli <florian@openwrt.org> wrote:
> 
> Changes since v3:
> - support daisy-chaining of 74x164 up to 32 gpios

cool, a new feature!



I kind of dislike doing this after having
offereed feedback that you accepted, but I'm going
to NAK this driver for mainline.

The reasons are associated with a point I made in
my last feedback.  The chip interface is SPI (but
it's not called that in the data sheets, true).

This driver is two things:

 - maybe 85% looks like spi-over-gpio, cloning what
the spi-gpio.c driver does (a three-wire SPI mode,
using the NO_RX option, vs normal four-wire).

The rest is a small 74x164 driver.

So if there are spare GPIOs *this* driver can be
used, but not if there's just a spare SPI select.

If this were re-packaged as a small SPI protocol
driver and a small SPI-over-GPIO instance both of
the two components would be more reusable...

Your current hardware can handle the SPI-over-GPIO
approach, obviously.

I'd ack a small 74x164 SPI protocol driver, which is
what I expected when I saw the first post.  But a
conglomerate driver -- no.  Sorry.

- Dave