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Sun, 8 Mar 2026 23:56:14 -0500 Received: from [10.24.73.74] (uda0492258.dhcp.ti.com [10.24.73.74]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 6294uAP7413614; Sun, 8 Mar 2026 23:56:10 -0500 Message-ID: <677ef6a4-7825-45d1-a4ad-a5722e0d01c3@ti.com> Date: Mon, 9 Mar 2026 10:28:01 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird CC: , , , , , , , , , , Subject: Re: [PATCH] arm64: dts: ti: k3-am62a7-sk: Fix pinmux for pin M19 used by sdhci1 To: Vignesh Raghavendra , Judith Mendez References: <20260212130843.1054100-1-s-vadapalli@ti.com> <0633e48a-27a3-456a-8b9b-32e88d417560@ti.com> Content-Language: en-US From: Siddharth Vadapalli In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00005FFE:EE_|PH0PR10MB4616:EE_ X-MS-Office365-Filtering-Correlation-Id: 987ea973-e614-4bcf-3a72-08de7d983196 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|376014|82310400026; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: d1NwJdMDzBvt8rYa0FHBcjyFPWFM/HewPhxCQa3P5Aruf+ajRSQNKJpSk2s3MihTukjbKO4tckDFo4+auovPd+L76kjC7RUPu3ujUpw1EKed486qHpIrmrZ2Pm6cYRMMCM1a8GZi7So5ufK53XOcekqtKy3OEkFS5u1Om3jDpOCqSg9NN32hZoV41LG/ZIUA8o4w3i9J/4GTkzWM6iO7Zc9/7JHtczlO5qEfvfYY8bu0/LhD8VC38F1Q1iejh/NXBAi8TCKGH8Ym4vhRdeFJSHpJWbRU44lal/ZgV3mpgpnls8jwzbM6BAunljxcYo1QLzr/jfPNbU6JGk3Z6tTYcRzd9eDFH49G4DKW3cLWT+SAM3cJY/JnAcVIY9dBYESZMnuJyww0fnvIoao01TXEZ3J+KAoDjsjJ/s/NjWqs1r/nY+WP5e0BeDwbOWSRN5si X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Mar 2026 04:56:15.2490 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 987ea973-e614-4bcf-3a72-08de7d983196 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.194];Helo=[flwvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00005FFE.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR10MB4616 On 09/03/26 10:05, Vignesh Raghavendra wrote: > > > On 04/03/26 10:24, Siddharth Vadapalli wrote: >> On 03/03/26 22:06, Judith Mendez wrote: >>> Hi Siddharth, >>> >>> On 2/12/26 7:06 AM, Siddharth Vadapalli wrote: >>>> According to the datasheet for the AM62Ax SoC [0], pin M19 has the >>>> address >>>> 0x000F40A8. Therefore, the offset to be passed to the AM62AX_IOPAD >>>> macro is >>>> 0xa8 and not 0x07c. With the existing incorrect offset, the following >>>> error >>>> is seen when Linux boots: >>>>     fa00000.mmc: deferred probe pending: platform: supplier >>>> regulator-5 not ready >>>> with the SD Card being unusable and the boot process halting due to >>>> the root >>>> filesystem in the SD Card being inaccessible. >>>> >>>> Hence, fix it. >>>> >>>> [0]: https://www.ti.com/lit/ds/symlink/am62a7.pdf >>>> >>>> Fixes: 8f023012eb4a ("arm64: dts: ti: k3-am62a: Enable UHS mode >>>> support for SD cards") >>>> Cc: >>>> Signed-off-by: Siddharth Vadapalli >>>> --- >>>> >>>> Hello, >>>> >>>> This patch is based on commit >>>> 37a93dd5c49b Merge tag 'net-next-7.0' of git://git.kernel.org/pub/ >>>> scm/ linux/kernel/git/netdev/net-next >>>> of Mainline Linux. >>>> >>>> Regards, >>>> Siddharth. >>>> >>>>   arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 2 +- >>>>   1 file changed, 1 insertion(+), 1 deletion(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/ >>>> boot/ dts/ti/k3-am62a7-sk.dts >>>> index e99bdbc2e0cb..9cfe7e7b317b 100644 >>>> --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts >>>> +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts >>>> @@ -398,7 +398,7 @@ AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) >>>> UART0_RTSn.GPIO1_23 */ >>>>       vddshv_sdio_pins_default: vddshv-sdio-default-pins { >>>>           pinctrl-single,pins = < >>>> -            AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) >>>> GPMC0_CLK.GPIO0_31 */ >>>> +            AM62AX_IOPAD(0x0a8, PIN_OUTPUT, 7) /* (M19) >>>> GPMC0_CLK.GPIO0_31 */ >>> >>> What! I don't think this is right. >>> >>> Looking at device tree, regulator-5 is using main_gpio0 31 to control SD >>> ENA with PMIC. Which is GPMC0_CLK (N22 pad) and VSEL_SD_SOC. Which is >>> 0x000F407C address in the device datasheet. So as far as I can see, the >>> original address is correct and just the (M19) name is wrong. Did you >>> test this patch to see if that fixed the failure? >> Yes, without this patch I saw the following: >> [    2.108345] Waiting for root device PARTUUID=076c4a2a-02... >> [   12.261669] platform fa00000.mmc: deferred probe pending: platform: >> supplier regulator-5 >> >> Since the pin was named 'M19' in the comment, I corrected the offset to >> match that of M19 and the issue was fixed. So it seems that although it >> fixed the issue, it isn't really a fix. >> > > Refer to the schematics and not datasheet for pin routing. Please submit > patch fixing the comment to say N22 I have posted the v2 patch fixing the pin name at: https://lore.kernel.org/r/20260309045539.2070793-1-s-vadapalli@ti.com/