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Subject: Re: [PATCH v2 3/6] arm64: Add tlbi_user_level TLB invalidation helper
To:     Catalin Marinas <catalin.marinas@arm.com>
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References: <20200423135656.2712-1-yezhenyu2@huawei.com>
 <20200423135656.2712-4-yezhenyu2@huawei.com> <20200522154925.GE26492@gaia>
From:   Zhenyu Ye <yezhenyu2@huawei.com>
Message-ID: <67ac92a2-d37b-d472-3cbc-0bc855235c3f@huawei.com>
Date:   Mon, 25 May 2020 14:57:58 +0800
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On 2020/5/22 23:49, Catalin Marinas wrote:
> On Thu, Apr 23, 2020 at 09:56:53PM +0800, Zhenyu Ye wrote:
>> @@ -190,8 +196,8 @@ static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,
>>  	unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));
>>  
>>  	dsb(ishst);
>> -	__tlbi(vale1is, addr);
>> -	__tlbi_user(vale1is, addr);
>> +	__tlbi_level(vale1is, addr, 0);
>> +	__tlbi_user_level(vale1is, addr, 0);
>>  }
> 
> This one remains with a level 0 throughout the series. Is this
> intentional? If we can't guarantee the level here, better to use the
> non-level __tlbi().
> 

OK, I will change it back to non-level __tlbi().

Thanks,
Zhenyu