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From: Yann Gautier <yann.gautier@foss.st.com>
To: Marek Vasut <marex@denx.de>, <linux-mmc@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
	Russell King <linux@armlinux.org.uk>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Vladimir Zapolskiy <vz@mleia.com>,
	<u.kleine-koenig@pengutronix.de>,
	Christophe Kerello <christophe.kerello@foss.st.com>,
	Ludovic Barre <ludovic.barre@foss.st.com>
Subject: Re: [PATCH 3/4] mmc: mmci: stm32: clear DLYB_CR after sending tuning command
Date: Thu, 16 Dec 2021 10:48:54 +0100	[thread overview]
Message-ID: <67c6d0be-078b-0726-698d-096c5e77b4ab@foss.st.com> (raw)
In-Reply-To: <05ab7b52-190e-048f-3803-7bed51e2b09c@denx.de>

On 12/16/21 10:13 AM, Marek Vasut wrote:
> On 12/15/21 15:17, Yann Gautier wrote:
>> During test campaign, and especially after several unbind/bind sequences,
>> it has been seen that the SD-card on SDMMC1 thread could freeze.
>> The freeze always appear on a CMD23 following a CMD19.
>> Checking SDMMC internal registers shows that the tuning command (CMD19)
>> has failed.
>> The freeze is then due to the delay block involved in the tuning 
>> sequence.
>> To correct this, clear the delay block register DLYB_CR register after
>> the tuning commands.
>>
>> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
>> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
>> ---
>>   drivers/mmc/host/mmci_stm32_sdmmc.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c 
>> b/drivers/mmc/host/mmci_stm32_sdmmc.c
>> index fdaa11f92fe6..a75d3dd34d18 100644
>> --- a/drivers/mmc/host/mmci_stm32_sdmmc.c
>> +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c
>> @@ -441,6 +441,8 @@ static int sdmmc_dlyb_phase_tuning(struct 
>> mmci_host *host, u32 opcode)
>>           return -EINVAL;
>>       }
>> +    writel_relaxed(0, dlyb->base + DLYB_CR);
>> +
>>       phase = end_of_len - max_len / 2;
>>       sdmmc_dlyb_set_cfgr(dlyb, dlyb->unit, phase, false);
> 
> Shouldn't this have a Fixes: tag and be CC stable ?
> This seems like a bugfix, no ?

Hi Marek,

You're right, I should have added:
Fixes: 1103f807a3b9 ("mmc: mmci_sdmmc: Add execute tuning with delay block")

Ulf, could you manage that, or should I push a new version?


Best regards,
Yann


  reply	other threads:[~2021-12-16  9:49 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-15 14:17 [PATCH 0/4] mmc: mmci: updates for STM32MP13 Yann Gautier
2021-12-15 14:17 ` [PATCH 1/4] mmc: mmci: Add support for sdmmc variant revision v2.2 Yann Gautier
2021-12-15 14:17 ` [PATCH 2/4] mmc: mmci: increase stm32 sdmmcv2 clock max freq Yann Gautier
2021-12-15 14:17 ` [PATCH 3/4] mmc: mmci: stm32: clear DLYB_CR after sending tuning command Yann Gautier
2021-12-16  9:13   ` Marek Vasut
2021-12-16  9:48     ` Yann Gautier [this message]
2021-12-21 13:02       ` Ulf Hansson
2021-12-15 14:17 ` [PATCH 4/4] mmc: mmci: add hs200 support for stm32 sdmmc Yann Gautier
2021-12-16  9:14   ` Marek Vasut
2021-12-16  9:44     ` Yann Gautier
2021-12-16 10:15       ` Marek Vasut
2021-12-16  3:23 ` [PATCH 0/4] mmc: mmci: updates for STM32MP13 Linus Walleij
2021-12-21 13:02 ` Ulf Hansson

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