From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41B7A1DA60B for ; Mon, 6 Jan 2025 11:20:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736162462; cv=none; b=np3i9wJEVjZdqm1dGP967eTDms6POTqHicb11r4QvmnWYvrhZfeki8r0QUucqQPD6+jGSAxpQz3rmocD7uylARnoReNcse8KvPNOHCLpUtVl7FEEBr6YMXWHnAKQNPbABUGAjQG+doyPZZtZVA3vxdR76ULNqvATqD4S4HzmwAM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736162462; c=relaxed/simple; bh=i+/aAag1qhjTG/hhieShqab8ye+VWG7DN6cXYoo7Lpc=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=Qb/+FEOmE4CZictN+JjT/xwxf+/t7JVdLk+UCfVoz/OUHMBXG3Pupux3ISTlueeuXi0scZIrlkxEYMoIB1gZo/J3d/2xDrv6mscIHOlNCJrnk+k3Cty8BjnKnqTpv/9+22E7JVvRFSUpD/dYzJO9BO6QU7b0970W8s2DTb2ZUyo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=WT32yNgH; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="WT32yNgH" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 506BKadq2410906 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 6 Jan 2025 05:20:36 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1736162436; bh=MT3zjQCTe8dYrha5bzI2b4O5GqZchwvbuXrBf8LpDmY=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=WT32yNgHZKl6uh2qr3Airp++lSs0i7jmoGTUD24eeZJzI0hE/bz86hjEcDQT346uG In5y/IZECLpg9L4moXpQ5SKrDAMiKJlKASCflx5/k2VFHE0+zxJ8ojLrkHhVsxzvJs +/KSWg4MsbI+Cku/2LcwOKPlVq4rY+an39A24Tq8= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 506BKaIA073249 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 6 Jan 2025 05:20:36 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 6 Jan 2025 05:20:36 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 6 Jan 2025 05:20:36 -0600 Received: from [172.24.227.241] (santhoshkumark.dhcp.ti.com [172.24.227.241]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 506BKXqg128614; Mon, 6 Jan 2025 05:20:34 -0600 Message-ID: <67ca6b29-6e55-48fa-8ad8-1850fd48f97a@ti.com> Date: Mon, 6 Jan 2025 16:50:32 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: defconfig: Enable SPI NAND flashes To: Krzysztof Kozlowski , "catalin.marinas@arm.com" , "will@kernel.org" CC: "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "Raghavendra, Vignesh" , "Mantena, Prasanth" , References: <20250102120043.1404843-1-s-k6@ti.com> <4cb46289-9f27-468f-a07a-13cbc28abc83@kernel.org> Content-Language: en-US From: Santhosh Kumar K In-Reply-To: <4cb46289-9f27-468f-a07a-13cbc28abc83@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Hi, Krzysztof, On 02/01/25 21:35, Krzysztof Kozlowski wrote: > On 02/01/2025 13:00, Santhosh Kumar K wrote: >> Add support for SPI NAND flashes on ARM64 boards/EVMs such as: >> >> 1. W35N01JW on AM62x LP SK, AM62Ax SK, J721S2 EVM, J784S4 EVM, >> J722S EVM, J742S2 EVM >> 2. W25N01JW on AM62Lx EVM >> > Please use recognizable names. git grep -i on some of above gave me zero > results, so no models, no compatibles, no makefile entries use above > names. Also really not sure where to look for - which vendor. This is > defconfig for all users of arm64, not your private one.\ 'git grep -i' on most of the above names results it's entry either from arch/arm64/boot/dts/ti/k3-*.dts or from drivers/mtd/nand/spi/winbond.c except for W35N01JW and AM62Lx EVM as the series which adds support for W35N01JW [1] and AM62Lx EVM [2] are yet to be merged. Some 'git grep -i' results for your reference: $ git grep -i "AM62x LP SK" arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts:14: model = "Texas Instruments AM62x LP SK"; $ git grep -i "J784S4 EVM" arch/arm64/boot/dts/ti/k3-j784s4-evm.dts:17: model = "Texas Instruments J784S4 EVM"; $ git grep -i W25N01JW drivers/mtd/nand/spi/winbond.c:254: SPINAND_INFO("W25N01JW", /* high-speed 1.8V */ Nit: 'AM62Ax SK' should be 'AM62A7 SK'. I'll edit it in v2. [1] https://lore.kernel.org/linux-mtd/20250102115110.1402440-1-s-k6@ti.com/T/#mfbbfc8852e70a077d2adbba0a4fddeed7b4237f1 [2] https://lore.kernel.org/linux-arm-kernel/20241117-am62lx-v1-0-4e71e42d781d@ti.com/ Thanks and Regards, Santhosh. > > Best regards, > Krzysztof