From: Vasant Hegde <vasant.hegde@amd.com>
To: Ankit Soni <Ankit.Soni@amd.com>,
iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>
Cc: suravee.suthikulpanit@amd.com, joro@8bytes.org, will@kernel.org,
robin.murphy@arm.com, linux-kernel@vger.kernel.org, jgg@ziepe.ca
Subject: Re: [PATCH v5 0/4] Respect VASIZE for address limits
Date: Sun, 17 May 2026 23:19:44 +0530 [thread overview]
Message-ID: <67ddc0ee-eb21-4bfe-9d12-ceda0005db91@amd.com> (raw)
In-Reply-To: <cover.1776075533.git.Ankit.Soni@amd.com>
Joerg,
On 4/13/2026 8:15 PM, Ankit Soni wrote:
> The AMD IOMMU driver was only using EFR[HATS] to derive the VA size,
> ignoring the IVINFO[VASIZE] limit. This could create domains that
> exceed the bounds advertised by hypervisor. With this series, driver
> respects IVINFO[VASIZE] when determining the addressable VA range.
Can you please pick this series? We will address Jerry's comment on PASize
separately.
Thanks
-Vasant
next prev parent reply other threads:[~2026-05-17 17:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-13 14:45 Ankit Soni
2026-04-13 14:45 ` [PATCH v5 1/4] iommu_pt: Fix pgsize_bitmap calculation in get_info for smaller vasz's Ankit Soni
2026-04-13 16:11 ` Jason Gunthorpe
2026-04-13 14:45 ` [PATCH v5 2/4] iommu_pt: support small VA for AMDv1 Ankit Soni
2026-04-13 16:11 ` Jason Gunthorpe
2026-05-17 17:17 ` Vasant Hegde
2026-04-13 14:45 ` [PATCH v5 3/4] iommu_pt: add kunit config for 32-bit VA (amdv1_cfg_1) Ankit Soni
2026-05-17 17:47 ` Vasant Hegde
2026-04-13 14:45 ` [PATCH v5 4/4] iommu/amd: Adhere to IVINFO[VASIZE] for address limits Ankit Soni
2026-05-08 19:23 ` [PATCH v5 0/4] Respect VASIZE " Jerry Snitselaar
2026-05-15 4:47 ` Ankit Soni
2026-05-17 17:49 ` Vasant Hegde [this message]
2026-06-12 8:46 ` Ankit Soni
2026-06-12 12:55 ` Joerg Roedel
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