From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: Aksh Garg <a-garg7@ti.com>
Cc: <linux-pci@vger.kernel.org>, <lpieralisi@kernel.org>,
<kwilczynski@kernel.org>, <mani@kernel.org>, <robh@kernel.org>,
<bhelgaas@google.com>, <arnd@arndb.de>, <mpillai@cadence.com>,
<hans.zhang@cixtech.com>, <unicorn_wang@outlook.com>,
<kishon@kernel.org>, <linux-kernel@vger.kernel.org>,
<danishanwar@ti.com>, <s-vadapalli@ti.com>
Subject: Re: [PATCH] PCI: cadence: j721e: Add support for PCI NTB functionality
Date: Fri, 20 Feb 2026 15:45:56 +0530 [thread overview]
Message-ID: <67ead554b375f563c8225b989819e5f7ee7a07f9.camel@ti.com> (raw)
In-Reply-To: <20260220101030.852423-1-a-garg7@ti.com>
On Fri, 2026-02-20 at 15:40 +0530, Aksh Garg wrote:
> Configure Non-Transparent Bridge (NTB) components to build along with
> J721E PCIe controller driver to add support for PCI NTB functionality
> in TI SoCs.
>
> NTB_NETDEV allows to setup a virtual ethernet interface over the
> NTB Transport layer, enabling connected systems to communicate with
> each other using standard network protocols and transfer data as
> ethernet traffic over the link.
>
> Signed-off-by: Aksh Garg <a-garg7@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Regards,
Siddharth.
next prev parent reply other threads:[~2026-02-20 10:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-20 10:10 Aksh Garg
2026-02-20 10:15 ` Siddharth Vadapalli [this message]
2026-03-05 4:55 ` Manivannan Sadhasivam
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