From: Dan Williams <dan.j.williams@intel.com>
To: Gregory Price <gourry@gourry.net>, <linux-cxl@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <kernel-team@meta.com>,
<dan.j.williams@intel.com>, <vishal.l.verma@intel.com>,
<dave.jiang@intel.com>, <dave@stgolabs.net>,
<jonathan.cameron@huawei.com>, <alison.schofield@intel.com>,
<ira.weiny@intel.com>
Subject: Re: [PATCH] cxl: core/region - ignore interleave granularity when ways=1
Date: Wed, 2 Apr 2025 14:59:17 -0700 [thread overview]
Message-ID: <67edb335dea8c_1a6d929437@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <20250402193443.944654-1-gourry@gourry.net>
Gregory Price wrote:
> When validating decoder IW/IG when setting up regions, the granularity
> is irrelevant when iw=1 - all accesses will always route to the only
> target anyway - so all ig values are "correct". Loosen the requirement
> that `ig = (parent_iw * parent_ig)` when iw=1.
Can you say a bit more here about the real world impact like we chatted
about on Discord? Something like:
---
The platform BIOS on "platform-X" specifies a 512-byte
interleave-granularity CXL Window when 256-byte is expected. This leads
to Linux erroneously rejecting the region configuration of 2 devices
attached to an x1 host bridge.
---
That way distros and platform-X folks can flag the importance of this fix.
next prev parent reply other threads:[~2025-04-02 21:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-02 19:34 Gregory Price
2025-04-02 19:46 ` Dave Jiang
2025-04-02 21:59 ` Dan Williams [this message]
2025-04-02 22:32 ` Gregory Price
2025-04-02 22:35 ` Dan Williams
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