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From: Hanjun Guo <hanjun.guo@linaro.org>
To: Majun <majun258@huawei.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, marc.zyngier@arm.com,
	tglx@linutronix.de, dingtianhong@huawei.com,
	guohanjun@huawei.com
Subject: Re: [PATCH] irqchip/mbigen: Fix the clear register offset
Date: Wed, 26 Apr 2017 11:10:09 +0800	[thread overview]
Message-ID: <68214147-bc4d-c542-ce40-78f69a63e53d@linaro.org> (raw)
In-Reply-To: <1493086563-36396-1-git-send-email-majun258@huawei.com>

Hi Majun,

On 2017/4/25 10:16, Majun wrote:
> From: MaJun <majun258@huawei.com>
>
> Don't minus reserved interrupts (64) when get the clear register offset,because
> the clear register space includes the space of these 64 interrupts.

Could you mention the background that there is a timeout mechanism
to clear the register in the mbigen to make the code work even we clear
the wrong (and noneffective) register? that will help for review I
think.

>
> Signed-off-by: MaJun <majun258@huawei.com>
> ---
>  drivers/irqchip/irq-mbigen.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
> index 061cdb8..75818a5 100644
> --- a/drivers/irqchip/irq-mbigen.c
> +++ b/drivers/irqchip/irq-mbigen.c
> @@ -108,7 +108,6 @@ static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq,
>  {
>  	unsigned int ofst;
>
> -	hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;
>  	ofst = hwirq / 32 * 4;
>
>  	*mask = 1 << (hwirq % 32);

How about following to save more lines of code:

--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -106,10 +106,7 @@ static inline void 
get_mbigen_type_reg(irq_hw_number_t hwirq,
  static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq,
                                         u32 *mask, u32 *addr)
  {
-       unsigned int ofst;
-
-       hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;
-       ofst = hwirq / 32 * 4;
+       unsigned int ofst = hwirq / 32 * 4;

         *mask = 1 << (hwirq % 32);
         *addr = ofst + REG_MBIGEN_CLEAR_OFFSET;

Thanks
Hanjun

  reply	other threads:[~2017-04-26  3:10 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-25  2:16 Majun
2017-04-26  3:10 ` Hanjun Guo [this message]
2017-04-26  8:01   ` Marc Zyngier
2017-04-27  1:27     ` majun (Euler7)
2017-04-27  1:59       ` Hanjun Guo

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