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charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2023-11-14 7:34 PM, Chen Wang wrote: > On 2023/11/15 1:31, Conor Dooley wrote: >> On Mon, Nov 13, 2023 at 09:20:11PM +0800, Chen Wang wrote: >>> From: Chen Wang >>> >>> Add clock generator node to device tree for SG2042, and enable clock for >>> uart0. >>> >>> Signed-off-by: Chen Wang >>> --- >>>   arch/riscv/boot/dts/sophgo/sg2042-clock.dtsi | 76 ++++++++++++++++++++ >> There's no need to create an entirely new file for this. > Agree, I will merge this into sg2042.dtsi in next revision. >> >>>   arch/riscv/boot/dts/sophgo/sg2042.dtsi       | 10 +++ >>>   2 files changed, 86 insertions(+) >>>   create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-clock.dtsi >>> >>> diff --git a/arch/riscv/boot/dts/sophgo/sg2042-clock.dtsi >>> b/arch/riscv/boot/dts/sophgo/sg2042-clock.dtsi >>> new file mode 100644 >>> index 000000000000..66d2723fab35 >>> --- /dev/null >>> +++ b/arch/riscv/boot/dts/sophgo/sg2042-clock.dtsi >>> @@ -0,0 +1,76 @@ >>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT) >>> +/* >>> + * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved. >>> + */ >>> + >>> +/ { >>> +    cgi: oscillator { >>> +        compatible = "fixed-clock"; >>> +        clock-frequency = <25000000>; >>> +        clock-output-names = "cgi"; >>> +        #clock-cells = <0>; >>> +    }; >> What actually is this oscillator? >> Is it provided by another clock controller on the SoC, or is it provided >> by an oscillator on the board? > > This oscillator is an individual ic chip outside the SoC on the board, that's > why I list it outside soc node. > > Actually the "cgi" is abbrevation for "Clock Generation IC chip". Since the oscillator is outside the SoC, this node (or at least its clock-frequency property) belongs in the board devicetree, not the SoC .dtsi. See [1]. Regards, Samuel [1]: https://lore.kernel.org/linux-riscv/b5401052-e803-9788-64d6-82b2737533ce@linaro.org/