From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 215E3C433EF for ; Wed, 11 May 2022 07:50:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238592AbiEKHt5 (ORCPT ); Wed, 11 May 2022 03:49:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243181AbiEKHtu (ORCPT ); Wed, 11 May 2022 03:49:50 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B7942380CE for ; Wed, 11 May 2022 00:49:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652255381; x=1683791381; h=message-id:subject:from:to:cc:date:in-reply-to: references:mime-version:content-transfer-encoding; bh=b6gFhgmPfcp/OZxV5AdY/HulAh7d6sjI5KnIRmFjjnE=; b=br4FO2HeL03j8llWkjIqTlDDbBnRMNoQmIVE6ttP1askSQsNr/LDcfrz tKeHsv+WUTHAcPliV2smWSuOWbB5jfLMu5WI3ccNCLke0WvF9zw/FGhwY 1vGu9Xyvk6hz+q8lw7J5LQ3n1UWus1+MhD666utouinUgu91pxuCYF6uK r/ePjJgT7g4MaIp6Ts5BrrAB3f5AnpiwESvdncQ5XaLdEMBetqisU1scS tmfTtHakNVJz1qVagmyYkj/Oa5fLXsm4IZIbTUUz40m2iWQWk3301/06k vd7AdeCOrCIa3iNgSSvCfvHe1vu0hpMIW6IzW8w4mYUSrjxAjQQyV40J6 w==; X-IronPort-AV: E=McAfee;i="6400,9594,10343"; a="269753785" X-IronPort-AV: E=Sophos;i="5.91,216,1647327600"; d="scan'208";a="269753785" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2022 00:49:41 -0700 X-IronPort-AV: E=Sophos;i="5.91,216,1647327600"; d="scan'208";a="593991837" Received: from rliu1-mobl1.ccr.corp.intel.com ([10.254.213.20]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2022 00:49:37 -0700 Message-ID: <68333b21a58604f3fd0e660f1a39921ae22849d8.camel@intel.com> Subject: Re: RFC: Memory Tiering Kernel Interfaces From: "ying.huang@intel.com" To: Wei Xu , "Aneesh Kumar K.V" Cc: Alistair Popple , Yang Shi , Andrew Morton , Dave Hansen , Dan Williams , Linux MM , Greg Thelen , Jagdish Gediya , Linux Kernel Mailing List , Davidlohr Bueso , Michal Hocko , Baolin Wang , Brice Goglin , Feng Tang , Jonathan Cameron , Tim Chen Date: Wed, 11 May 2022 15:49:34 +0800 In-Reply-To: References: <87tua3h5r1.fsf@nvdebian.thelocal> <875ymerl81.fsf@nvdebian.thelocal> <87fslhhb2l.fsf@linux.ibm.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2022-05-10 at 22:30 -0700, Wei Xu wrote: > On Tue, May 10, 2022 at 4:38 AM Aneesh Kumar K.V > wrote: > > > > Alistair Popple writes: > > > > > Wei Xu writes: > > > > > > > On Thu, May 5, 2022 at 5:19 PM Alistair Popple wrote: > > > > > > > > > > Wei Xu writes: > > > > > > > > > > [...] > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Tiering Hierarchy Initialization > > > > > > > > `==============================' > > > > > > > > > > > > > > > > By default, all memory nodes are in the top tier (N_TOPTIER_MEMORY). > > > > > > > > > > > > > > > > A device driver can remove its memory nodes from the top tier, e.g. > > > > > > > > a dax driver can remove PMEM nodes from the top tier. > > > > > > > > > > > > > > With the topology built by firmware we should not need this. > > > > > > > > > > I agree that in an ideal world the hierarchy should be built by firmware based > > > > > on something like the HMAT. But I also think being able to override this will be > > > > > useful in getting there. Therefore a way of overriding the generated hierarchy > > > > > would be good, either via sysfs or kernel boot parameter if we don't want to > > > > > commit to a particular user interface now. > > > > > > > > > > However I'm less sure letting device-drivers override this is a good idea. How > > > > > for example would a GPU driver make sure it's node is in the top tier? By moving > > > > > every node that the driver does not know about out of N_TOPTIER_MEMORY? That > > > > > could get messy if say there were two drivers both of which wanted their node to > > > > > be in the top tier. > > > > > > > > The suggestion is to allow a device driver to opt out its memory > > > > devices from the top-tier, not the other way around. > > > > > > So how would demotion work in the case of accelerators then? In that > > > case we would want GPU memory to demote to DRAM, but that won't happen > > > if both DRAM and GPU memory are in N_TOPTIER_MEMORY and it seems the > > > only override available with this proposal would move GPU memory into a > > > lower tier, which is the opposite of what's needed there. > > > > How about we do 3 tiers now. dax kmem devices can be registered to > > tier 3. By default all numa nodes can be registered at tier 2 and HBM or > > GPU can be enabled to register at tier 1. ? > > This makes sense. I will send an updated RFC based on the discussions so far. Are these tier number fixed? If so, it appears strange that the smallest tier number is 0 on some machines, but 1 on some other machines. Best Regards, Huang, Ying