From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CC8FC433E0 for ; Tue, 23 Feb 2021 12:19:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1F6C164E00 for ; Tue, 23 Feb 2021 12:19:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232417AbhBWMTE (ORCPT ); Tue, 23 Feb 2021 07:19:04 -0500 Received: from foss.arm.com ([217.140.110.172]:46614 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231403AbhBWMTC (ORCPT ); Tue, 23 Feb 2021 07:19:02 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9676831B; Tue, 23 Feb 2021 04:18:15 -0800 (PST) Received: from [10.37.8.9] (unknown [10.37.8.9]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C54B63F70D; Tue, 23 Feb 2021 04:18:12 -0800 (PST) Subject: Re: [PATCH v13 4/7] arm64: mte: Enable TCO in functions that can read beyond buffer limits To: Catalin Marinas Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Andrew Morton , Will Deacon , Dmitry Vyukov , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Branislav Rankov , Andrey Konovalov , Lorenzo Pieralisi References: <20210211153353.29094-1-vincenzo.frascino@arm.com> <20210211153353.29094-5-vincenzo.frascino@arm.com> <20210212172128.GE7718@arm.com> <20210222175825.GE19604@arm.com> <6111633c-3bbd-edfa-86a0-be580a9ebcc8@arm.com> <20210223120530.GA20769@arm.com> From: Vincenzo Frascino Message-ID: <6865788c-7e63-fbd7-bb88-ba01eafb2f63@arm.com> Date: Tue, 23 Feb 2021 12:22:27 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210223120530.GA20769@arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/23/21 12:05 PM, Catalin Marinas wrote: >> I totally agree on this point. In the case of runtime switching we might need >> the rethink completely the strategy and depends a lot on what we want to allow >> and what not. For the kernel I imagine we will need to expose something in sysfs >> that affects all the cores and then maybe stop_machine() to propagate it to all >> the cores. Do you think having some of the cores running in sync mode and some >> in async is a viable solution? > stop_machine() is an option indeed. I think it's still possible to run > some cores in async while others in sync but the static key here would > only be toggled when no async CPUs are left. > In such a case we might need to track the state based on cpuid() and have a mask that tells us when cpus are all sync. Not as expensive as stop_machine() but still requires a valid use case to be introduced according to me. -- Regards, Vincenzo