From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 178B2364EBE for ; Wed, 17 Dec 2025 13:31:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765978288; cv=none; b=hqVZlM7DubDVOiVufom+/TC6yyeRnjkwk40lwbEBa4F6ly2fw+NE5cNEBZpy19jFzGIP/Nhie/d9fKdB0E0WLXy9bovwUCXG/10Q9wwklcnTyCyz0c8ORO86f2kbKkPztsUf+P7irGqu5SHngRQo4X2B6x30X/thxW5cUwPP4gQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765978288; c=relaxed/simple; bh=RBLLRntVZWVpvoCZWnUgVT+GEF3ElFZl4/sQLo2kLZ0=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=bXTT/yVFbhyCVd/ydozPZJiza9ayPbD7VgW2obrZjseu+bo7NqEMMVuGC4HDVJGcNlqhPuQ3YeSQdddOjmTCbAODMzJZ4k/TVA440hsHnqo2o9Ur5CBQzGT4jMWrUv2evXHTiwLqajdvrMHKl1bI3ZMrn8h0P6QQ7upLI9BS+F8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=X/kSzDD7; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=XvumRo+D; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="X/kSzDD7"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="XvumRo+D" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5BHCL0p12502769 for ; Wed, 17 Dec 2025 13:31:24 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 2euulZIF75eNjE+jfDopkk3bG+5t6JFAkFjDEEAd70E=; b=X/kSzDD7wSqN2mt3 2lHQrnHI0KWleAdNmovA1YZkbw0rCjvlTpg3rEiG3EIyTX4BLXSfGx06vxA3sJGH USce/l/UotBZZenv75JqG4E25Zp5vH2vJZ6sOfQNSXaW4odNVahJi1nDIag+NUha za2QYgIWPZ7w7gcPyqdGvuneZNx4zwjZDgyjHtKlf7rP2J5cd73GZrB6NBkgtTJa I6ETWJvazIc6AETQ2ggJVOg9P/0vU62jfCcmKio5a4UZWIP05Zem1noJfWc2Nq3/ lDrE1YOhmy4RJItptE+HD6iYsB0VpaOha4H1rcsXg7kXQmtqwL5EolfYUMe9hEQg Fx04uQ== Received: from mail-ua1-f69.google.com (mail-ua1-f69.google.com [209.85.222.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4b3rqa8yyx-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 17 Dec 2025 13:31:23 +0000 (GMT) Received: by mail-ua1-f69.google.com with SMTP id a1e0cc1a2514c-93f390d26fbso445454241.0 for ; Wed, 17 Dec 2025 05:31:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1765978283; x=1766583083; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=2euulZIF75eNjE+jfDopkk3bG+5t6JFAkFjDEEAd70E=; b=XvumRo+DmYTPNkUXtNfA7qNOExKOdylzFGbJGgcK+W5DzGeNYGMyfd67j78AFOxl5k N/ZRqlnGsvnm7yYgK3WG9ZB9YDNDYY0jjiII/CmEhTp2QCN0iIpZHK613JzeRUEy48Js Wp1nhFEKjszJA8e0sYDQZY6gzcMmb4Vot6WTnaZMCgky5J0+OUQVJqZIqWXVb1JQj/BI mrKS+24dVdwQk8nHO9EzuUcwCx2LJruEcALNMyVZugW24OCkh51xP/PJhUD7FwG7ozLU 1/8H7TaYbTlzkp/nVDKXKtVIWSh9q7Lsluhsk+7kWVrpssEekwqzL3jS0PDi031grcGM 5Dyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765978283; x=1766583083; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=2euulZIF75eNjE+jfDopkk3bG+5t6JFAkFjDEEAd70E=; b=jBa0cqKyL/xfcAo6CQrxCf/Y1Wbuku1Evn73qui5SGOVssymtA7jLlZ6qlfxRvwiA8 9wSx6Wg9q7m88qsJv4GqVCHDAi9TTl/8ykJvpWwSEPPvY40mH6PDBtYhHQOOOkz+Ua7a Yahgz+PAVGTwyU0OY3udiLrQu6uissyStBRru2eqlIOksTvhc8nK5V6XBPRe31045PYe tsCRGhfGDiz4/e/3VSmee7KFXYgcd9HTkE06z+/nAAD5h3OBmY5B2vgUlfCh6ZMH8t86 7oNzIovcYxnrR4uMADVitItI+9ur4JpAi+4/OoJh2Yd6PSgDD2cSW6zBISzRCOIJVMk+ snjQ== X-Forwarded-Encrypted: i=1; AJvYcCVXV7zi626rxVrZi5GEmy2AeJXQDx5uwLpQhU43Zyha2RN+v2/p1QgiZ6+6GGMLnIB49iXmFS3geQhEDuo=@vger.kernel.org X-Gm-Message-State: AOJu0Yxf8tcr5LHvDWS3GMkSQLQ4BAD/zKoxUoKy2RlrQ8iBlEGMCOxp Nv2+kQKTjV+GxG9GVcOT0OOglEzOVtZWq7hrV3CvtzwZePehIWgBXHnFfC74CpxfJ25dGki2TMK REW07zQ56fpOp7AS1tFBZz+L3Si69R+lyw401iBagTDqi8naYXIQacBgRjvf7ctkzZa0= X-Gm-Gg: AY/fxX7RpZUfR5dtk91Sy6mlWbUslhUrzroqhiGQG1lQPe7w3+mh+w4yaQOX1/bIuNl V01q2MnbrP+5jYCiAPKkO4K4mBzNWF6LDRVACTAd6ozMpC/gjwfhH44gXhlUdlyNNVb4qQ3R41s ywRbbccpFQ2+KGY12WFXYSpujeAHqfjG1GSAsdB/kxK2/ze6GjPHic39tVKIj5sFLhtyQq+fAvA 6rc57+2rl+cB7LpoPGqi6ZyO/SdqHXZ9l97p31SSSwFByx4N2d8vQJVjdqPpY1fvYfsiqpkDhHr Wpu6xmPbS1pOWsMZwMjNfRLNIYQJBp/KP3qMhKaZos18uUqy8WxjuOfxLAAI/u5uufnL4NwD4FM 6hyGjiKXq1hhx3REwjbmY2ApyyZabRTw70qh+Qe23gaFi/9IIMnCZtnHmNcKMrEBF8A== X-Received: by 2002:a67:c405:0:b0:5df:af0f:309f with SMTP id ada2fe7eead31-5e82728ab3amr3222781137.0.1765978282866; Wed, 17 Dec 2025 05:31:22 -0800 (PST) X-Google-Smtp-Source: AGHT+IHvnlK6mH5YvpaVoknvDnQ436wUIAdp2dfjCfg72O6QLXAFenjMtzOwBS4IPx0mHAicsrW9gQ== X-Received: by 2002:a67:c405:0:b0:5df:af0f:309f with SMTP id ada2fe7eead31-5e82728ab3amr3222755137.0.1765978282443; Wed, 17 Dec 2025 05:31:22 -0800 (PST) Received: from [192.168.119.72] (078088045245.garwolin.vectranet.pl. [78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b80013c7ea0sm336503166b.65.2025.12.17.05.31.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 Dec 2025 05:31:21 -0800 (PST) Message-ID: <689db2b8-6845-4ac8-a012-e589dc11e45d@oss.qualcomm.com> Date: Wed, 17 Dec 2025 14:31:18 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH WIP v2 3/8] media: qcom: camss: Prepare CSID for C-PHY support To: David Heidelberg , Robert Foss , Todor Tomov , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , Casey Connolly , "Dr. Git" Cc: Joel Selvaraj , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org References: <20251204-qcom-cphy-v2-0-6b35ef8b071e@ixit.cz> <20251204-qcom-cphy-v2-3-6b35ef8b071e@ixit.cz> <9af39b45-581b-4e25-8ab9-19015f00d6bc@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: 6KnK-QdYOdkPvCAnrLIWUIMcCX3Te_7K X-Authority-Analysis: v=2.4 cv=ALq93nRn c=1 sm=1 tr=0 ts=6942b0ab cx=c_pps a=UbhLPJ621ZpgOD2l3yZY1w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=pJuDoVvVS2QliF8PZP0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=TOPH6uDL9cOC6tEoww4z:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE3MDEwNSBTYWx0ZWRfX2ODf4NYpjh96 7qHWWxeDx+3K9VPFYSUiBSIuXSszNgvOddOmDDlgQSG9UWTsHu6klA0LaAfkfiNgtYmBJYLWMnE ZHAcBN8AtEpdwwbbrl4HP7GV8Gx9OQKPRN7Yxm2iNYPpI1/+zQhXeRNwiHNuQq8sDsH3EQhaP5R H9QiO+pLBfYpw1ptV17t+s5tNy2g70rpo2HKE3KooBUzc+dgpZdvdMRqxfczxojftLTx5EQyFX0 wdZm6czV1OcOltHzwD4oTXSHtp6ZIz9jzIytRs+RUBKgEmzu7lRdM+DzDs13kMGuRulfLt4pEVo ot81A0iQVTTI21QllNTZSIeHegBKvrbCq85uPI5j0zbJTsOp5gJGBFfGDY6XKjmCHVisPpHJchc jH3RPV/x7DGSipSlvZ6d5LMA1+vp7A== X-Proofpoint-GUID: 6KnK-QdYOdkPvCAnrLIWUIMcCX3Te_7K X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-17_01,2025-12-16_05,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 impostorscore=0 spamscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512170105 On 12/11/25 4:20 PM, David Heidelberg wrote: > On 05/12/2025 10:43, Konrad Dybcio wrote: >> On 12/4/25 5:32 PM, David Heidelberg via B4 Relay wrote: >>> From: David Heidelberg >>> >>> Inherit C-PHY information from CSIPHY, so we can configure CSID >>> properly. >>> >>> CSI2_RX_CFG0_PHY_TYPE_SEL must be set to 1, when C-PHY mode is used. >>> >>> Signed-off-by: David Heidelberg >>> --- >>>   drivers/media/platform/qcom/camss/camss-csid-gen2.c | 1 + >>>   drivers/media/platform/qcom/camss/camss-csid.c      | 1 + >>>   drivers/media/platform/qcom/camss/camss-csid.h      | 1 + >>>   3 files changed, 3 insertions(+) >>> >>> diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen2.c b/drivers/media/platform/qcom/camss/camss-csid-gen2.c >>> index 2a1746dcc1c5b..033036ae28a4f 100644 >>> --- a/drivers/media/platform/qcom/camss/camss-csid-gen2.c >>> +++ b/drivers/media/platform/qcom/camss/camss-csid-gen2.c >>> @@ -183,6 +183,7 @@ static void __csid_configure_rx(struct csid_device *csid, >>>       val = (lane_cnt - 1) << CSI2_RX_CFG0_NUM_ACTIVE_LANES; >>>       val |= phy->lane_assign << CSI2_RX_CFG0_DL0_INPUT_SEL; >>>       val |= phy->csiphy_id << CSI2_RX_CFG0_PHY_NUM_SEL; >>> +    val |= csid->phy.cphy << CSI2_RX_CFG0_PHY_TYPE_SEL; >> >> This field is 1-wide, this would be neater: >> >> if (csid->phy.cphy) >>     val |= BIT(CSI2_RX_CFG0_PHY_TYPE_SEL); > > Hello Konrad, > > while your change make sense as we work with 1-bit. > On other hand, due to TYPE_SEL naming, it's not very explicit why we set this bit when cphy is on. This is the actual name of the register field > > Maybe I could propose renaming CSI2_RX_CFG0_PHY_TYPE_SEL to CSI2_RX_CFG0_PHY_TYPE_SEL_CPHY, then setting 1 to it would make sense. > > Most clean solution to me would be something like > > #define TYPE_SEL_DPHY    0 > #define TYPE_SEL_CPHY    1 > > val |= (csid->phy.cphy ? TYPE_SEL_CPHY : TYPE_SEL_DPHY) << CSI2_RX_CFG0_PHY_TYPE_SEL > > Do I overthinking this? What do you think? Perhaps just: /* Set the PHY_TYPE_SEL bit to enable C-PHY mode */ if (csid->phy.cphy) val |= BIT(CSI2_RX_CFG0_PHY_TYPE_SEL); ? Konrad