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From: Randy Dunlap <rdunlap@infradead.org>
To: xurui <xurui@kylinos.cn>, tsbogend@alpha.franken.de
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC] MIPS: Fix a compilation issue
Date: Fri, 6 Jan 2023 15:37:25 -0800	[thread overview]
Message-ID: <68bb3273-9795-8436-c588-8ff8da4aaa08@infradead.org> (raw)
In-Reply-To: <20230106030956.1589041-1-xurui@kylinos.cn>

Hi--

On 1/5/23 19:09, xurui wrote:
> arch/mips/include/asm/mach-rc32434/pci.h:377:
> cc1: error: result of ‘-117440512 << 16’ requires 44 bits to represent, but ‘int’ only has 32 bits [-Werror=shift-overflow=]
> 
> I guss we don`t need a left shift here?
> 
> Signed-off-by: xurui <xurui@kylinos.cn>
> ---
>  arch/mips/include/asm/mach-rc32434/pci.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/include/asm/mach-rc32434/pci.h b/arch/mips/include/asm/mach-rc32434/pci.h
> index 9a6eefd12757..3eb767c8a4ee 100644
> --- a/arch/mips/include/asm/mach-rc32434/pci.h
> +++ b/arch/mips/include/asm/mach-rc32434/pci.h
> @@ -374,7 +374,7 @@ struct pci_msu {
>  				 PCI_CFG04_STAT_SSE | \
>  				 PCI_CFG04_STAT_PE)
>  
> -#define KORINA_CNFG1		((KORINA_STAT<<16)|KORINA_CMD)
> +#define KORINA_CNFG1		(KORINA_STAT | KORINA_CMD)

I looked at all of the macro values here and this change makes sense to me,
although I know nothing about these registers.

Thanks.

>  
>  #define KORINA_REVID		0
>  #define KORINA_CLASS_CODE	0

-- 
~Randy

  reply	other threads:[~2023-01-06 23:37 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-06  3:09 xurui
2023-01-06 23:37 ` Randy Dunlap [this message]
2023-01-18  8:59 xurui
2023-01-27 16:28 ` Thomas Bogendoerfer

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