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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b1ae981c55sm3828201a91.1.2026.11.13.01.36.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Nov 2026 01:36:36 -0800 (PST) Message-ID: <68bb5fe0-9005-4517-aec0-c39021a5b24f@oss.qualcomm.com> Date: Fri, 13 Nov 2026 17:36:28 +0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 5/5] iommu/of: Add support for "iommu-ranges" on a device node To: Vikash Garodia , "Joerg Roedel (AMD)" , Vasant Hegde , Suravee Suthikulpanit , Will Deacon , Robin Murphy , David Woodhouse , Lu Baolu , Jean-Philippe Brucker , Rob Herring , Saravana Kannan , Tomasz Nowicki , Eric Auger , Bryan O'Donoghue , Joerg Roedel , Srinath Mannam , Oza Pawandeep , Lorenzo Pieralisi , Bjorn Helgaas , Alex Williamson Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, virtualization@lists.linux.dev, devicetree@vger.kernel.org, kvm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, Dmitry Baryshkov , Vishnu Reddy References: <20261106-add_iommu_ranges-v7-0-5c0f72083e52@oss.qualcomm.com> <20261106-add_iommu_ranges-v7-5-5c0f72083e52@oss.qualcomm.com> Content-Language: en-US From: Yijie Yang In-Reply-To: <20261106-add_iommu_ranges-v7-5-5c0f72083e52@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=S+5MU4sP c=1 sm=1 tr=0 ts=6af6da26 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=BUd8g3l6cCjgLUHkIXsA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTEzMDAzOCBTYWx0ZWRfX9sWiyzRdE4Ea TJvJmHoqAET5UiNzc1Lx+VBZtiDW5Pc0PSTM9VTEiRqvXxTcYR+afZV0xpvFnobE+ULlstPGasO tREhgaVRpSKbiAnXEx+miRjnDUiuI5H/OmjcHdtCbJLJQWk7fNVhuZwh9xBvNjBcBt/whQtdZ0t fJpkvMFbKyRh0ugwT2UwZuw3vOrPr3RN09gAHYtIlepRJt1tw87Ao8B7aC1Gmb/mTmwuZaEGDgA pOWnoYXQojrPXzGRWRtsgHOi7BzXRJIMvdL+k5eVg0V/r1jEtihvEBwBta5AJ5TBIEkuo0sgn79 Lj4usK8wDFzQXReHPYbpFQ7W2k8NKPGt2bLuglyJQt05+mIa+QguPL2fQL88Z1mgnGP5FwK/wc6 /IHtQyXtRLc762XrMULZS9Jtj92P02mJmjzVFoU8GgNHUmVSK7FuZmWiHzrsB5IPyayX3YiukMX o9CslU+9/Hve2T8D2uQ== X-Proofpoint-ORIG-GUID: LLtD1faKjecMeIoQ_-CZpjK0s4K2Qrxg X-Proofpoint-Spam-Info: AW1haW4tMjYxMTEzMDAzOCBTYWx0ZWRfX1PM6YfhBWNUT NrtDDU4UTtK6zjZ0qpCi5ta8bTyH0fCOk+EW9vEUowc2pHhAuu5thAmwCrwphjOK76m0N0hO8DU 2nxQMAXbWyyTIBYWqOtjErcdZqTAG0Y= X-Proofpoint-GUID: LLtD1faKjecMeIoQ_-CZpjK0s4K2Qrxg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-13_03,2026-11-11_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 clxscore=1015 phishscore=0 malwarescore=0 adultscore=0 spamscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611130038 On 11/7/2026 1:14 AM, Vikash Garodia wrote: > Reserving an IOVA address using "iommu-addresses" requires it to be > placed in the reserved-memory node. But when "iommu-addresses" is the > only property being described and there is no backing "reg" (i.e. no > actual reserved system memory), it does not really belong under > /reserved-memory. A device IOVA range is specific to its own address > space, and does not describe the system physical memory to make it > qualify under reserved-memory. Given this, place "iommu-addresses" > inside reserved-memory only when it is paired with a "reg", otherwise, > define it within the device own node. It was discussed here: > https://lore.kernel.org/all/662f7093-fb0a-4564-9ca0-98e03e68ba9a@kernel.org > > Existing "iommu-addresses" property expects a phandle, which does > not make sense when the property is defined within the device node. > "iommu-ranges" was introduced to specify the device specific IOVA ranges > when there is no backing "reg". > > Suggested-by: Rob Herring > Reviewed-by: Dmitry Baryshkov > Co-developed-by: Vishnu Reddy > Signed-off-by: Vishnu Reddy > Signed-off-by: Vikash Garodia > --- > drivers/iommu/of_iommu.c | 107 +++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 107 insertions(+) > > diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c > index 00b02c19f27e195fc36c4bc1d91253255147c9ab..e133d3b346feecac7e2bfaec44e4882060ee89ec 100644 > --- a/drivers/iommu/of_iommu.c > +++ b/drivers/iommu/of_iommu.c > @@ -183,6 +183,111 @@ iommu_resv_region_get_type(struct device *dev, > return IOMMU_RESV_RESERVED; > } > > +/** > + * of_iommu_derive_resv_regions - derive reserved regions which > + * are outside of iommu-ranges > + * @dev: device for which to get reserved regions > + * @list: reserved region list > + * > + * A device can describe its own usable IOVA ranges directly on its node > + * via "iommu-ranges". Everything not under those ranges is derived > + * as a reserved region so the IOMMU allocator won't use it. Entries may > + * appear in any order in the property. > + */ > +static void of_iommu_derive_resv_regions(struct device *dev, struct list_head *list) > +{ > + struct of_iommu_range { > + struct list_head node; > + phys_addr_t start; > + phys_addr_t end; > + } *pos, *new, *next_range; > + int size, prot = IOMMU_READ | IOMMU_WRITE; > + struct iommu_resv_region *region; > + const __be32 *maps, *end; > + struct list_head *prev; > + phys_addr_t next = 0; > + LIST_HEAD(ranges); > + > + maps = of_get_property(dev->of_node, "iommu-ranges", &size); > + if (!maps) > + return; > + > + end = maps + size / sizeof(__be32); > + > + while (maps < end) { > + phys_addr_t iova, iova_end; > + resource_size_t length; > + > + maps = of_translate_dma_region(dev->of_node, maps, &iova, &length); > + if (!maps) { > + dev_err(dev, "%pOF: failed to parse iommu-ranges\n", > + dev->of_node); > + goto exit; > + } > + > + if (!length) > + continue; > + > + iova_end = iova + length - 1; > + > + if (iova_end < iova) { > + dev_err(dev, "%pOF: iommu-ranges overflows address space\n", > + dev->of_node); > + goto exit; > + } > + > + prev = &ranges; > + list_for_each_entry(pos, &ranges, node) { > + if (pos->start > iova) > + break; > + prev = &pos->node; > + } > + > + new = kmalloc_obj(*new); > + if (!new) > + goto exit; > + > + new->start = iova; > + new->end = iova_end; > + list_add(&new->node, prev); > + } > + > + if (list_empty(&ranges)) > + return; > + > + if (of_dma_is_coherent(dev->of_node)) > + prot |= IOMMU_CACHE; > + > + list_for_each_entry_safe(pos, next_range, &ranges, node) { > + if (pos->start > next) { > + region = iommu_alloc_resv_region(next, pos->start - next, prot, > + IOMMU_RESV_RESERVED, GFP_KERNEL); > + if (region) > + list_add_tail(®ion->list, list); Why keep looping here after allocation failure? > + } > + > + if (pos->end >= PHYS_ADDR_MAX - 1) > + goto exit; > + > + if (pos->end >= next) > + next = pos->end + 1; > + > + list_del(&pos->node); > + kfree(pos); > + } > + > + region = iommu_alloc_resv_region(next, PHYS_ADDR_MAX - next, > + prot, IOMMU_RESV_RESERVED, GFP_KERNEL); > + if (region) > + list_add_tail(®ion->list, list); > + > +exit: > + list_for_each_entry_safe(pos, next_range, &ranges, node) { > + list_del(&pos->node); > + kfree(pos); > + } > +} > + > /** > * of_iommu_get_resv_regions - reserved region driver helper for device tree > * @dev: device for which to get reserved regions > @@ -262,5 +367,7 @@ void of_iommu_get_resv_regions(struct device *dev, struct list_head *list) > } > } > } > + > + of_iommu_derive_resv_regions(dev, list); > } > EXPORT_SYMBOL(of_iommu_get_resv_regions); > -- Best Regards, Yijie