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[95.249.236.54]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45f326133a8sm132690315e9.6.2025.09.22.04.36.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Sep 2025 04:36:45 -0700 (PDT) Message-ID: <68d134ce.050a0220.375eef.da87@mx.google.com> X-Google-Original-Message-ID: Date: Mon, 22 Sep 2025 13:36:40 +0200 From: Christian Marangi To: AngeloGioacchino Del Regno Cc: Ryder Lee , Jianjun Wang , Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, upstream@airoha.com Subject: Re: [PATCH 1/2] dt-bindings: PCI: mediatek-gen3: Add support for Airoha AN7583 References: <20250920092612.21464-1-ansuelsmth@gmail.com> <40efb310-e63b-47ea-b62b-cc3d614c47b4@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <40efb310-e63b-47ea-b62b-cc3d614c47b4@collabora.com> On Mon, Sep 22, 2025 at 01:34:06PM +0200, AngeloGioacchino Del Regno wrote: > Il 20/09/25 11:25, Christian Marangi ha scritto: > > Introduce Airoha AN7583 SoC compatible in mediatek-gen3 PCIe controller > > binding. > > > > This differ from the Airoha EN7581 SoC by the fact that only one Gen3 > > PCIe controller is present on the SoC. > > > > Signed-off-by: Christian Marangi > > --- > > .../bindings/pci/mediatek-pcie-gen3.yaml | 21 +++++++++++++++++++ > > 1 file changed, 21 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > > index 0278845701ce..3f556d1327a6 100644 > > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > > @@ -59,6 +59,7 @@ properties: > > - const: mediatek,mt8192-pcie > > - const: mediatek,mt8196-pcie > > "an" comes before "en", please move it here. > > Also, for consistency with all of the other compatibles, this should be just > "airoha,an7583-pcie": please rename it. > Thanks for the review. The "gen3" wasn't added randomly. On AN7583 they put both gen2 and gen3 PCIe. One line is gen3, the other gen2. So either we differenciate for gen2 or we add the gen3 tag. I decided to add it here to follow the naming pattern with mediatek-pcie-gen3. If you have better idea on this, I'm all open. > > - const: airoha,en7581-pcie > > + - const: airoha,an7583-pcie-gen3 > > > > > reg: > > maxItems: 1 > > @@ -298,6 +299,26 @@ allOf: > > - const: phy-lane1 > > - const: phy-lane2 > > + - if: > > + properties: > > + compatible: > > + const: airoha,an7583-pcie-gen3 > > same for this if block, please put it before en7583. > > Everything else looks good. > > Cheers, > Angelo > > > + then: > > + properties: > > + clocks: > > + maxItems: 1 > > + > > + clock-names: > > + items: > > + - const: sys-ck > > + > > + resets: > > + minItems: 1 > > + > > + reset-names: > > + items: > > + - const: phy-lane0 > > + > > unevaluatedProperties: false > > examples: > > > -- Ansuel