From: Andrew Lunn <andrew@lunn.ch>
To: Christian Marangi <ansuelsmth@gmail.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Daniel Golle <daniel@makrotopia.org>,
Qingfang Deng <dqfext@gmail.com>,
SkyLake Huang <SkyLake.Huang@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Joris Vaisvila <joey@tinyisr.com>,
Ahmed Naseef <naseefkm@gmail.com>,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH net-next v4 5/6] net: phy: mediatek: add calibration logic for AN7581
Date: Wed, 4 Nov 2026 21:51:17 +0100 [thread overview]
Message-ID: <68eecc53-ed61-463d-bb5f-c68b507be82a@lunn.ch> (raw)
In-Reply-To: <6aeb7861.6171b307.11ae12.6b94@mx.google.com>
> It's safe in the measure that the worst is that link goes down during the
> calibration... I will rework the function to assign the base address to the
> default address for port 0 (it's hardcoded by the SoC) and use the lock and
> read/write helper instead.
Are there multiple PHYs in the package? What happens if both are doing
calibration at the same time?
PHY #0 PHY #1
phy_modify_mmd(phydev, devad, regnum, mask, cal_val);
phy_modify_mmd(phydev, devad, regnum, mask, cal_val);
ret = mtk_cal_cycle_wait(phydev_p0);
ret = mtk_cal_cycle_wait(phydev_p0);
Andrew
next prev parent reply other threads:[~2026-11-04 20:51 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 22:14 [PATCH net-next v4 0/6] net: phy: mediatek: calibration for AN7581/3 Christian Marangi
2026-11-03 22:14 ` [PATCH net-next v4 1/6] net: phy: mediatek: export __mtk_tr_write Christian Marangi
2026-11-04 2:32 ` Andrew Lunn
2026-11-03 22:14 ` [PATCH net-next v4 2/6] net: phy: mediatek: move MTK GE SoC registers define to dedicated header Christian Marangi
2026-11-04 2:33 ` Andrew Lunn
2026-11-03 22:14 ` [PATCH net-next v4 3/6] net: phy: mediatek: generalize cal_cycle function for GE SoC Christian Marangi
2026-11-04 2:34 ` Andrew Lunn
2026-11-03 22:14 ` [PATCH net-next v4 4/6] net: phy: mediatek: split Airoha code to dedicated source Christian Marangi
2026-11-04 2:38 ` Andrew Lunn
2026-11-03 22:14 ` [PATCH net-next v4 5/6] net: phy: mediatek: add calibration logic for AN7581 Christian Marangi
2026-11-04 3:47 ` Andrew Lunn
2026-11-04 18:24 ` Christian Marangi
2026-11-04 20:51 ` Andrew Lunn [this message]
2026-11-04 22:38 ` Benjamin Larsson
2026-11-03 22:14 ` [PATCH net-next v4 6/6] net: phy: mediatek: add calibration logic for AN7583 Christian Marangi
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