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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8022f9530fsm223265666b.12.2025.12.18.04.36.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Dec 2025 04:36:48 -0800 (PST) Message-ID: <69ac0e2b-82d5-43d2-816d-d3ac31963077@oss.qualcomm.com> Date: Thu, 18 Dec 2025 13:36:44 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] clk: qcom: camcc: Add camera clock controller driver for SM8750 SoC To: Taniya Das , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Vladimir Zapolskiy , Jagadeesh Kona Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org References: <20251202-sm8750_camcc-v1-0-b3f7ef6723f1@oss.qualcomm.com> <20251202-sm8750_camcc-v1-3-b3f7ef6723f1@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20251202-sm8750_camcc-v1-3-b3f7ef6723f1@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE4MDEwNCBTYWx0ZWRfXxcJ8XHFoboZc Y1zkgTvpZtIVYAYZpwbk5mB4pbhR+BNY1CS7YiwT0F9QE239bO1Sf7f6W1ExKUxRJna0qAIxgse Ps7M2YCSiUplfATOrkTLYsfeG6Xa5WRhdSxPVPEq3Czdug3+uUN3AyomYNMigQEi2Wxp1JP4wVn ms+Ju2zohcnu5cy+mDNpm82jGTdLOJAZcLjTqCks/8Yn7QB826LXZgKByOwDV/WmWKrLrheLKwg drLEUAPvZPP45d3xhu2DqW1IM72GXA6iAGT1iF/wt5RLv2/dgdNUbv/B8MtTBBn/6MhSBnifSI1 /G81SQdHgWPrgS6NFkkN027eHNr9F5qwOG0KeTZ3GgFodqC2oEaSPnaL4XMLINwAJndwlWhdvxU EFffGiuW5tNyt2F9LOgv0EKXug1uDQ== X-Proofpoint-GUID: hWjpyz1cpkgGpbDhFY4HLKBrPn2CGTHG X-Proofpoint-ORIG-GUID: hWjpyz1cpkgGpbDhFY4HLKBrPn2CGTHG X-Authority-Analysis: v=2.4 cv=Zpjg6t7G c=1 sm=1 tr=0 ts=6943f562 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=_j3VNrtD_Kzz85i8SO4A:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-18_01,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 malwarescore=0 clxscore=1015 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512180104 On 12/2/25 11:26 AM, Taniya Das wrote: > Add support for the Camera Clock Controller (CAMCC) on the SM8750 > platform. > > The CAMCC block on SM8750 includes both the primary camera clock > controller and the Camera BIST clock controller, which provides the > functional MCLK required for camera operations. > > Signed-off-by: Taniya Das > --- Reviewed-by: Konrad Dybcio Konrad