From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5092C43219 for ; Tue, 11 Oct 2022 17:52:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229812AbiJKRwi (ORCPT ); Tue, 11 Oct 2022 13:52:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229825AbiJKRwf (ORCPT ); Tue, 11 Oct 2022 13:52:35 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.221.58]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D79940037; Tue, 11 Oct 2022 10:52:31 -0700 (PDT) X-QQ-mid: bizesmtp67t1665510739tbwjqr9m Received: from [192.168.1.231] ( [113.72.146.141]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 12 Oct 2022 01:52:18 +0800 (CST) X-QQ-SSF: 0100000000200090B000B00A0000000 X-QQ-FEAT: eSZ1CZgv+JDpbz+8SZtFjGpBaoHZNJKphrrKecDmH7nFw9yOYamWc6tnUXtiK 5hqBaXLrf5CuIHQTdb0xFyaOht6w2j/pHl/eluwYwBsXw/EYe1upcfnk8v/ClL+IhgLqg1D NQWyxjYe2HsuXrYs0WZNLcSpZYVdZC7iJCx0Pruqa/KnemRMSq9WYz9/OtaPqOrh8r+eFrn 77a4bV7aFLfWOzNgU3oekYrgRNUegBHk8OhXbHqYfwIPeC6kkc1nuw7f+NPrXtWJIpCEjy+ W+lDWWcd1xXRXOz8KqzeDSadVBRMPFcB3o8T9bdwfcYhDvuaEE8pihJHU/taIhOdmcCRC/r CpfCAVlKq4JPAfRbyNoY0rHYmdeAA== X-QQ-GoodBg: 0 Message-ID: <6BB36B91BD2046FD+e637d229-f656-a548-c45a-8d62a0c7928d@linux.starfivetech.com> Date: Wed, 12 Oct 2022 01:52:18 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [PATCH v1 17/30] dt-bindings: clock: Add starfive,jh7110-clkgen-sys bindings To: Krzysztof Kozlowski Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Philipp Zabel , Stephen Boyd , Michael Turquette , Linus Walleij , Emil Renner Berthing , linux-kernel@vger.kernel.org References: <20220929143225.17907-1-hal.feng@linux.starfivetech.com> <20220929222647.23816-1-hal.feng@linux.starfivetech.com> Content-Language: en-US From: Hal Feng In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:linux.starfivetech.com:qybglogicsvr:qybglogicsvr2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 30 Sep 2022 12:58:12 +0200, Krzysztof Kozlowski wrote: > On 30/09/2022 00:26, Hal Feng wrote: > > From: Emil Renner Berthing > > > > Add bindings for the system clock generator on the JH7110 > > RISC-V SoC by StarFive Technology Ltd. > > > > Signed-off-by: Emil Renner Berthing > > Signed-off-by: Hal Feng > > (...) > > > + '#clock-cells': > > + const: 1 > > + description: > > + See for valid indices. > > + > > +required: > > + - compatible > > + - clocks > > + - clock-names > > + - '#clock-cells' > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + syscrg_clk: clock-controller@13020000 { > > Does not look like you tested the bindings. Please run `make > dt_binding_check` (see > Documentation/devicetree/bindings/writing-schema.rst for instructions). Will rewrite the bindings and test them. Thanks. Best regards, Hal