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Peter Anvin" , Peter Zijlstra , Thomas Gleixner , Josh Poimboeuf , Nick Desaulniers Subject: Re: [PATCH v2 -tip] x86/percpu: Use C for arch_raw_cpu_ptr() Thread-Topic: [PATCH v2 -tip] x86/percpu: Use C for arch_raw_cpu_ptr() Thread-Index: AQHZ+5jZGZywpkB5zE2yxvhqDFo/FrBDSECAgAAOE4CAAAQxgIABoxnfgAAgI4CAAAYlgIAHqOMRgAAI04CAADzyiIABTsvzgAADAQCAAB/hAIAADVOAgAClpgCAABXQAIAANUA7gAAQyoCAACJcPoAAE0DxgAAcTYCAAAW/gA== Date: Wed, 18 Oct 2023 18:29:06 +0000 Message-ID: <6D0B6A98-9C4B-4889-896E-3C412BFC5397@vmware.com> References: <20231010164234.140750-1-ubizjak@gmail.com> <0617BB2F-D08F-410F-A6EE-4135BB03863C@vmware.com> <7D77A452-E61E-4B8B-B49C-949E1C8E257C@vmware.com> <9F926586-20D9-4979-AB7A-71124BBAABD3@vmware.com> <3F9D776E-AD7E-4814-9E3C-508550AD9287@vmware.com> <28B9471C-4FB0-4AB0-81DD-4885C3645E95@vmware.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Apple Mail (2.3731.700.6) authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=vmware.com; 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charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: vmware.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BY3PR05MB8531.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 478a2e00-f019-4ba8-5095-08dbd0081ca3 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Oct 2023 18:29:06.1233 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b39138ca-3cee-4b4a-a4d6-cd83d9dd62f0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: WtoP0CZKbInlGjCV4Y2X1EmfrCtWLIc+744OFRGT27v9cDC/YDJE1ffNBGO4djgUJ5kT8nH/x6DTwbxxuktkyQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR05MB7946 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Oct 18, 2023, at 9:08 PM, Uros Bizjak wrote: >=20 > We can use alias to __seg_gs non-const memory, so the value can be > accessed without asm. __barrier() will then force reload. Please note > that any memory clobber, hidden inside asm will also force reload. For the record, at the time I tried to find a creative solution to have fine granularity barrier control. I looked into address-spaces, pure and const function attributes, and use of the restrict keyword. I did not find a better solution. The behavior of most of these mechanisms was non-intuitive for me and inconsistent across compilers. You may succeed where I have failed as you seem more familiar with the compiler code, but be aware it is a rabbit hole...