From: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
To: Mark Brown <broonie@kernel.org>,
alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Cc: Xiubo.Lee@gmail.com, festevam@gmail.com, nicoleotsuka@gmail.com,
perex@perex.cz, kuninori.morimoto.gx@renesas.com,
michael@amarulasolutions.com, shengjiu.wang@gmail.com,
lgirdwood@gmail.com, tiwai@suse.com, bkylerussell@gmail.com
Subject: Re: [RFC patch 0/5] Support BCLK input clock in tlv320aic31xx
Date: Fri, 3 Dec 2021 14:25:17 -0300 [thread overview]
Message-ID: <6a2ff1f0-ebd9-be6d-9b2c-5704edd7c25d@collabora.com> (raw)
In-Reply-To: <163762561675.2471742.16439171676950432106.b4-ty@kernel.org>
Hi Mark,
On 11/22/21 9:00 PM, Mark Brown wrote:
> On Fri, 19 Nov 2021 12:32:43 -0300, Ariel D'Alessandro wrote:
>> The tlv320aic31xx codec allows using BCLK as the input clock for PLL,
>> deriving all the frequencies through a set of divisors.
>>
>> In this case, codec sysclk is determined by the hwparams sample
>> rate/format. So its frequency must be updated from the codec itself when
>> these are changed.
>>
>> [...]
>
> Applied to
>
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
>
> Thanks!
>
> [1/5] ASoC: tlv320aic31xx: Fix typo in BCLK clock name
> commit: 7016fd940adf2f4d86032339b546c6ecd737062f
> [2/5] ASoC: tlv320aic31xx: Add support for pll_r coefficient
> commit: 2664b24a8c51c21b24c2b37b7f10d6485c35b7c1
> [3/5] ASoC: tlv320aic31xx: Add divs for bclk as clk_in
> commit: 6e6752a9c78738e27bde6da5cefa393b589276bb
> [4/5] ASoC: tlv320aic31xx: Handle BCLK set as PLL input configuration
> commit: c5d22d5e12e776fee4e346dc098fe51d00c2f983
> [5/5] ASoC: fsl-asoc-card: Support fsl,imx-audio-tlv320aic31xx codec
> commit: 8c9b9cfb7724685ce705f511b882f30597596536
>
> All being well this means that it will be integrated into the linux-next
> tree (usually sometime in the next 24 hours) and sent to Linus during
> the next merge window (or sooner if it is a bug fix), however if
> problems are discovered then the patch may be dropped or reverted.
>
> You may get further e-mails resulting from automated or manual testing
> and review of the tree, please engage with people reporting problems and
> send followup patches addressing any issues that are reported if needed.
>
> If any updates are required or you are submitting further changes they
> should be sent as incremental updates against current git, existing
> patches will not be replaced.
Quick question:
I gotta send a fix for one of the patches. So, should it be a new
incremental patch or I can still send a patchset v2?
Also, I sent an incremental update patchset on top of this one:
[PATCH 0/4] fsl-asoc-card: Add optional dt property for setting mclk-id
I could merge altogether on a patchset v2. Please let me know, and sorry
the process it's not clear to me :-)
Thanks,
Ariel
next prev parent reply other threads:[~2021-12-03 17:25 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-19 15:32 Ariel D'Alessandro
2021-11-19 15:32 ` [RFC patch 1/5] ASoC: tlv320aic31xx: Fix typo in BCLK clock name Ariel D'Alessandro
2021-11-19 15:32 ` [RFC patch 2/5] ASoC: tlv320aic31xx: Add support for pll_r coefficient Ariel D'Alessandro
2021-11-22 14:22 ` Mark Brown
2021-11-22 14:24 ` Michael Nazzareno Trimarchi
2021-11-22 14:33 ` Mark Brown
2021-11-19 15:32 ` [RFC patch 3/5] ASoC: tlv320aic31xx: Add divs for bclk as clk_in Ariel D'Alessandro
2021-11-19 15:32 ` [RFC patch 4/5] ASoC: tlv320aic31xx: Handle BCLK set as PLL input configuration Ariel D'Alessandro
2021-11-19 15:32 ` [RFC patch 5/5] ASoC: fsl-asoc-card: Support fsl,imx-audio-tlv320aic31xx codec Ariel D'Alessandro
2021-12-03 17:27 ` Ariel D'Alessandro
2021-11-23 0:00 ` [RFC patch 0/5] Support BCLK input clock in tlv320aic31xx Mark Brown
2021-12-03 17:25 ` Ariel D'Alessandro [this message]
2021-12-03 17:34 ` Mark Brown
2021-12-03 17:37 ` Ariel D'Alessandro
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