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Mon, 23 Feb 2026 14:15:47 -0600 Received: from [128.247.81.105] (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 61NKFlUI1434678; Mon, 23 Feb 2026 14:15:47 -0600 Message-ID: <6a8488d6-d1a0-441a-b7c0-d18c1da36472@ti.com> Date: Mon, 23 Feb 2026 14:15:47 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] arm64: dts: ti: k3-am62l-evm: Disable MMC0 internal pulls To: Moteen Shah , Nishanth Menon , "Vignesh Raghavendra" CC: Tero Kristo , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , , , , Andrew Davis References: <20260212184246.2316659-1-jm@ti.com> <20260212184246.2316659-3-jm@ti.com> Content-Language: en-US From: Judith Mendez In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD80:EE_|SA1PR10MB997787:EE_ X-MS-Office365-Filtering-Correlation-Id: 860e8d84-2229-4521-b695-08de73185893 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: lkOwbXF0IP3KW7JvgwWE8A+jX1Ap4C3L1QUdtqsWgy30jcc3uEZVFNekiJd8yqCPNBF/j0dw99No45RpoHrkNGbBXmZVVYO+zWqpSwGUC1aqQg5SnRmR2q/PqMJjMVYJCbcLl7s8q09r1UgtuuJsKE7ib+5cpDPKCkSHggaayEwDU6KvvNY9XU8XvYL/z6X/kR+fqarFQKNJWji5Zib7ecDfs3KZMrA0gFyoOwkqLHyxjlkdUEe8mba79U3+T7Tl5QCox3rRAsC10f8LgXFChlIHohnCvUSRrCElMcXoc5GOeGCaxtOyvYLZ4ZaFVLH8KMEBXym/fXyElmzSr1EAwIzWYmsUPraauW2ytcncRJZnbJlMmAzjsbKnro+Xsa7v98iOHMqIOruCl0N0mhZTuzlDEQiRWB8fmG+u5onhNbAiZIW7fxY0VTnjctdB6Wc0 X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 20:15:53.4778 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 860e8d84-2229-4521-b695-08de73185893 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.195];Helo=[lewvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD80.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR10MB997787 Hello Moteen, On 2/20/26 2:57 AM, Moteen Shah wrote: > Hey Judith, > > On 13/02/26 00:12, Judith Mendez wrote: >> AM62L EVM has external pullups on MMC0 CMD and D0 pins [0]. Remove >> internal pullups considering: >> - having both internal and external pullups reduces the total pull-up >>    resistance < 47K resulting in a value below the spec recommended >> 50K ohms >> - having both pullups results in unnecessary power consumption >> >> Fixes: 00fb4c73b67d ("arm64: dts: ti: k3-am62l: add initial reference >> board file") >> [0] https://www.ti.com/lit/zip/SPRCAL6 >> Signed-off-by: Judith Mendez >> --- >>   arch/arm64/boot/dts/ti/k3-am62l3-evm.dts | 4 ++-- >>   1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts b/arch/arm64/ >> boot/dts/ti/k3-am62l3-evm.dts >> index cae04cce33736..5085cd255fcd5 100644 >> --- a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts >> +++ b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts >> @@ -253,9 +253,9 @@ AM62LX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D8) >> I2C2_SDA */ >>       mmc0_pins_default: mmc0-default-pins { >>           pinctrl-single,pins = < >> -            AM62LX_IOPAD(0x0214, PIN_INPUT_PULLUP, 0) /* (D2) >> MMC0_CMD */ >> +            AM62LX_IOPAD(0x0214, PIN_INPUT, 0) /* (D2) MMC0_CMD */ >>               AM62LX_IOPAD(0x020c, PIN_OUTPUT, 0) /* (B2) MMC0_CLK */ >> -            AM62LX_IOPAD(0x0208, PIN_INPUT_PULLUP, 0) /* (D3) >> MMC0_DAT0 */ >> +            AM62LX_IOPAD(0x0208, PIN_INPUT, 0) /* (D3) MMC0_DAT0 */ >>               AM62LX_IOPAD(0x0204, PIN_INPUT_PULLUP, 0) /* (D4) >> MMC0_DAT1 */ >>               AM62LX_IOPAD(0x0200, PIN_INPUT_PULLUP, 0) /* (C1) >> MMC0_DAT2 */ >>               AM62LX_IOPAD(0x01fc, PIN_INPUT_PULLUP, 0) /* (C2) >> MMC0_DAT3 */ > > > Wont the change result in mismatched pullup resistance and will the > mismatch between D0 and D1-D3 won't cause potential timing issues for > modes with tighter timing requirements? If you leave the internal pullup on MMC0_DAT0, then you will have a greater mismatch actually. But I noticed a wrong detail on the commit description after reviewing the patches again. So will respin the series, thanks for reviewing Moteen. ~ Judith