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smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=A+QlnDLN; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF173606A327; Thu, 12 Nov 2026 09:01:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=A+QlnDLN Received: by smtp.kernel.org (Postfix) with ESMTPSA id F165E1F00A0D; Thu, 12 Nov 2026 09:01:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1794474093; bh=UU03pdQXvnZhnp48bfMOqGxzcN0ycFpUm4aKAjaRGoU=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=A+QlnDLN4dqpSwg7GeMb7nW0Xx0z9WIMvCnlPG8lRaZJSW5f56yU7Qer41MbaOXtc sztGXvox+GkmXBvRml4izMX+ncvN5+z36z4179Urvn2nFNl/LPe5Bq6puWEX6mZ8N4 +a5JxJinzw1yrxncWvdyYgHG5rg4rFAOrysxFNDOuhlLAgEoNY+D4HwPORfDb4V0BU +jb1Pl4TF+U4atES3OZ/YvEa4G25d5yjJ8uRZi0SJRrSc5sw29Mx1KdM9cWJluyij4 L5TArHVaN4gaeINIVp7ROwmBmsJGVFXBv7b6XjWt26tO1rUugEfJtPYHDiWr0kk5NR 4oIXjvjoASsFA== Message-ID: <6a897be9-8732-41c7-890b-ac943fe106e6@kernel.org> Date: Thu, 12 Nov 2026 10:01:22 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/4] soc: toshiba: tc9564: config system controller To: Alex Elder , sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com, p.zabel@pengutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: daniel@riscstar.com, mohd.anwar@oss.qualcomm.com, lorenzo.bianconi@oss.qualcomm.com, fabrice.gasnier@foss.st.com, alexandre.torgue@foss.st.com, marex@nabladev.com, changhuang.liang@starfivetech.com, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261104004332.2141282-1-elder@riscstar.com> <675dec20-1cd7-4d37-89b4-23237b760f33@riscstar.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 09/11/2026 18:42, Alex Elder wrote: > On 11/5/26 2:26 PM, Krzysztof Kozlowski wrote: >> On 04/11/2026 01:43, Alex Elder wrote: >>> This series is comprised of some code that was previously sent >>> separately. It now incorporates a new system controller driver >>> that advertises clock and reset functionality, as well as regmap >>> access to its address range. This combination is being treated >>> as a new series. (Details of previous versions are below.) >>> >>> The Toshiba TC9564 is an SoC that attaches to a host system via PCIe. >>> It includes a PCIe switch with three downstream ports. To one of >>> these ports an embedded PCIe endpoint is attached, and that implements >>> two PCI functions. BAR 4 for both PCI functions provides access to >>> registers controlling blocks within the SoC. >>> >>> The system controller driver adds the clock and reset devices >>> using the mfd_add_devices() interface. The clocks and resets >>> are implemented by drivers included in this series. >> >> Toshiba TC9564 bindings and DTS should be posted completely. We spent >> great amount of time on discussing already and I pointed more than once >> that big picture is missing. > > https://github.com/riscstar/linux/blob/tc9564-dts/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > Node pcie@3,0 is the third switch port (within the TC9564), which > has an embedded PCIe endpoint with two functions. (You can ignore > pci-ep-bus@0 for now.) > >> You are not describing here parts of a SoC. >> >> You are describing one, single device how the host sees it and DT >> maintainers (and writing bindings) ask for complete picture in such cases. > > I'm glad to provide whatever information you need. There is more > than one way to provide the "complete picture" however, and I don't > want to send something that isn't helpful. > > If you want something different from just the DTS file linked above, > please say so and I'll put something together. The DTS was enough and it shows that you described internals of the device. I keep my claim, that is not correct representation because it is too detailed and too complicated. Nothing related to the syscon should be represented in DT, because these are internal registers handled by the device itself. DT does not describe internals of the devices, but how the device is being represented for the host. And Rob Herring already expressed that, if I understand correctly: https://lore.kernel.org/lkml/20260605144032.GA3659201-robh@kernel.org/ "And really, a DT node for them should be completely optional (unless there's some power on ctrl needed)." "Everything else like SPI, GPIO, UART, etc. should be under the PCIe switch upstream node in a pci-ep-bus." You don't get multiple syscons and other internal routing elements. Best regards, Krzysztof