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Utilize the same to set the AVIC > physical max index in the VMCB, similar to VMX. This helps hardware > limit the number of entries to be scanned in the physical APIC ID table > speeding up IPI broadcasts for virtual machines with smaller number of > vcpus. > > The minimum allocation required for the Physical APIC ID table is one 4k > page supporting up to 512 entries. With AVIC support for 4096 vcpus > though, it is sufficient to only allocate memory to accommodate the > AVIC physical max index that will be programmed into the VMCB. Limit > memory allocated for the Physical APIC ID table accordingly. > > Signed-off-by: Naveen N Rao (AMD) > --- > arch/x86/kvm/svm/avic.c | 54 ++++++++++++++++++++++++++++++----------- > arch/x86/kvm/svm/svm.c | 6 +++++ > arch/x86/kvm/svm/svm.h | 1 + > 3 files changed, 47 insertions(+), 14 deletions(-) > > diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c > index 4c940f4fd34d..e6ec3bcb1e37 100644 > --- a/arch/x86/kvm/svm/avic.c > +++ b/arch/x86/kvm/svm/avic.c > @@ -85,6 +85,17 @@ struct amd_svm_iommu_ir { > void *data; /* Storing pointer to struct amd_ir_data */ > }; > > +static inline u32 avic_get_max_physical_id(struct kvm *kvm, bool x2apic_mode) > +{ > + u32 avic_max_physical_id = x2apic_mode ? x2avic_max_physical_id : AVIC_MAX_PHYSICAL_ID; > + > + /* > + * Assume vcpu_id is the same as APIC ID. Per KVM_CAP_MAX_VCPU_ID, max_vcpu_ids > + * represents the max APIC ID for this vm, rather than the max vcpus. > + */ > + return min(kvm->arch.max_vcpu_ids - 1, avic_max_physical_id); > +} > + > static void avic_activate_vmcb(struct vcpu_svm *svm) > { > struct vmcb *vmcb = svm->vmcb01.ptr; > @@ -103,7 +114,7 @@ static void avic_activate_vmcb(struct vcpu_svm *svm) > */ > if (x2avic_enabled && apic_x2apic_mode(svm->vcpu.arch.apic)) { > vmcb->control.int_ctl |= X2APIC_MODE_MASK; > - vmcb->control.avic_physical_id |= x2avic_max_physical_id; > + vmcb->control.avic_physical_id |= avic_get_max_physical_id(svm->vcpu.kvm, true); > /* Disabling MSR intercept for x2APIC registers */ > svm_set_x2apic_msr_interception(svm, false); > } else { > @@ -114,7 +125,7 @@ static void avic_activate_vmcb(struct vcpu_svm *svm) > kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, &svm->vcpu); > > /* For xAVIC and hybrid-xAVIC modes */ > - vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID; > + vmcb->control.avic_physical_id |= avic_get_max_physical_id(svm->vcpu.kvm, false); > /* Enabling MSR intercept for x2APIC registers */ > svm_set_x2apic_msr_interception(svm, true); > } > @@ -174,6 +185,12 @@ int avic_ga_log_notifier(u32 ga_tag) > return 0; > } > > +static inline int avic_get_physical_id_table_order(struct kvm *kvm) > +{ > + /* Limit to the maximum physical ID supported in x2avic mode */ > + return get_order((avic_get_max_physical_id(kvm, true) + 1) * sizeof(u64)); > +} > + > void avic_vm_destroy(struct kvm *kvm) > { > unsigned long flags; > @@ -185,7 +202,8 @@ void avic_vm_destroy(struct kvm *kvm) > if (kvm_svm->avic_logical_id_table_page) > __free_page(kvm_svm->avic_logical_id_table_page); > if (kvm_svm->avic_physical_id_table_page) > - __free_page(kvm_svm->avic_physical_id_table_page); > + __free_pages(kvm_svm->avic_physical_id_table_page, > + avic_get_physical_id_table_order(kvm)); Move this hunk to previous patch (1/2) ? Rest looks good. -Vasant