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Thu, 15 Oct 2026 03:29:59 -0700 (PDT) X-Received: by 2002:a17:90b:224c:b0:3a8:6a6b:596d with SMTP id 98e67ed59e1d1-3ab3a9a8d66mr19929491a91.26.1792060199340; Thu, 15 Oct 2026 03:29:59 -0700 (PDT) Received: from [10.64.69.173] ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ac944511c7sm4093439a91.10.2026.10.15.03.29.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Oct 2026 03:29:58 -0700 (PDT) Message-ID: <6ac22076-073b-407e-b6e5-1f4d0a229121@oss.qualcomm.com> Date: Thu, 15 Oct 2026 18:29:50 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU To: Krzysztof Kozlowski Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Manikandan , Abel Vesa , Yuanjie Yang , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261014-msm_gdsc2-v3-0-f1ed69014416@oss.qualcomm.com> <20261014-msm_gdsc2-v3-1-f1ed69014416@oss.qualcomm.com> <20261014-elated-hasty-coot-ae3485@quoll> Content-Language: en-US From: Yongxing Mou In-Reply-To: <20261014-elated-hasty-coot-ae3485@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDA0MSBTYWx0ZWRfX1pC2RAFSHRtG cFszU1fAo7DNwtprMsTmBnMO6McXlltgQJpir6vdl2lDFLWxIBOQr6PBARQjCcgV8U7/SVFTDWh FZ6jRslKGgRF3U0QTcxC2udT0WP6vXk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDA0MSBTYWx0ZWRfX6+pUEMIG0YYw 7+UWd5zpYj19CVVjL4/7RPS09tiS/O5D05VK5qLlkyjt+ji6iY+59ZqmTMQ/SSxA6Dfkg96QP0j iiMOld0b9eRXfyhnAcMOZgHW58WcCSS2xePMmssRdgxtXhVw0cTqWYAm1zVi6K73VhCduv0bfry nTA5CJ64BaDh9iT2IGhB6CuIgcZjRpg61gPXWSEgC12H3Ki+EDWJXOsr2130ELB+gOKWzj2Lyy4 S6cBUk0F1tpJjZoWgjgLvsMoHB9dReLPFnDzfuCsg73hUa+Pk9NIZIY8oDk/gEdUgomux0FH62z JiKjaDdrUcIB5xQl6nJj/wd/Pkw2Xkd70HE/KvTeXio+ywUHd8Hu2ohIvMcwUL7jQ1dQZ40ninA ApDmlWCHKXG729kbE1Jio4PZuFP6h40Pt59NjxvDLAgY3UDdHWSYaRnIvjcRAlCW3oTnmS3/yCG Ve2MhSfdGEgR2BHPNyA== X-Authority-Analysis: v=2.4 cv=BNMmP1QG c=1 sm=1 tr=0 ts=6ad0ab28 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=4m8bAy1w6SXghX4ugIsA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-GUID: GzkNq20jnuPzhHIAUD21qfU-NxBGVj0m X-Proofpoint-ORIG-GUID: GzkNq20jnuPzhHIAUD21qfU-NxBGVj0m X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150041 On 10/14/2026 7:31 PM, Krzysztof Kozlowski wrote: > On Wed, Oct 14, 2026 at 12:38:16PM +0800, Yongxing Mou wrote: >> Kaanapali (SM8850) has two display GDSCs. CORE_GDSC supplies shared >> MDSS hardware and most of the DPU, while INT2 GDSC supplies the >> VIG2/VIG3/DMA5 source pipes. Without INT2 GDSC, these source pipes >> remain inaccessible. >> >> Describe CORE and INT2 as power domains of the DPU device, matching >> the hardware partitioning. INT2 only supplies DPU-local source pipes, >> while CORE also remains attached to the parent MDSS device because it >> supplies shared MDSS hardware. DPU performance-state votes on CORE are >> propagated through the genpd hierarchy to its parent MMCX domain. >> >> Restrict the two-domain schema to the Kaanapali DPU compatible, so other >> platforms sharing qcom,sm8650-dpu.yaml retain the existing single >> power-domain constraint. >> >> Signed-off-by: Yongxing Mou >> --- >> .../devicetree/bindings/display/msm/dpu-common.yaml | 19 +++++++++++++++++-- >> .../bindings/display/msm/qcom,kaanapali-mdss.yaml | 4 +++- >> .../bindings/display/msm/qcom,sm8650-dpu.yaml | 21 +++++++++++++++++++++ >> 3 files changed, 41 insertions(+), 3 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml >> index 3f953aa5e694..19b791a857b5 100644 >> --- a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml >> +++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml >> @@ -25,8 +25,7 @@ properties: >> interrupts: >> maxItems: 1 >> >> - power-domains: >> - maxItems: 1 >> + power-domains: true > > No, widest constraints always stay here. Look at other bindings. > Got it. Thanks. So here mean allowing up to two power domains in dpu-common.yaml, requiring two for Kaanapali in qcom,sm8650-dpu.yaml, and adding maxItems: 1 to the other DPU bindings to preserve their existing constraints?>> >> operating-points-v2: true >> opp-table: >> @@ -53,4 +52,20 @@ required: >> - operating-points-v2 >> - ports >> >> +allOf: >> + - if: >> + properties: >> + compatible: >> + contains: >> + const: qcom,kaanapali-dpu > > There is no such compatible. Open this file and point me to it. Why are > you adding this compatible to common schema? Is there any prior art > doing something like this? > Thanks for pointing this out. I will move the Kaanapali-specific constraint to qcom,sm8650-dpu.yaml, where qcom,kaanapali-dpu is defined. > Best regards, > Krzysztof >