Re: [PATCH v6 1/3] dt-bindings: clock: airoha: Document support for AN7583 clock

[Christian Marangi <ansuelsmth@gmail.com>]

On Mon, Sep 07, 2026 at 11:24:41AM +0200, Christian Marangi wrote:
> On Thu, Aug 27, 2026 at 11:52:13AM +0200, Krzysztof Kozlowski wrote:
> > On Thu, Aug 20, 2026 at 12:14:54AM +0200, Christian Marangi wrote:
> > > Document support for Airoha AN7583 clock. This is based on the EN7523
> > > clock schema with the new requirement of the "airoha,chip-scu".
> > > 
> > > Add additional binding for additional clock and reset lines.
> > > 
> > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > ---
> > >  .../bindings/clock/airoha,en7523-scu.yaml     | 20 ++++++
> > >  include/dt-bindings/clock/en7523-clk.h        |  3 +
> > >  .../dt-bindings/reset/airoha,an7583-reset.h   | 65 +++++++++++++++++++
> > >  3 files changed, 88 insertions(+)
> > >  create mode 100644 include/dt-bindings/reset/airoha,an7583-reset.h
> > > 
> > > diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
> > > index eb24a5687639..edecc635807b 100644
> > > --- a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
> > > +++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
> > > @@ -30,6 +30,7 @@ properties:
> > >    compatible:
> > >      items:
> > >        - enum:
> > > +          - airoha,an7583-scu
> > >            - airoha,en7523-scu
> > >            - airoha,en7581-scu
> > >            - econet,en751221-scu
> > > @@ -50,12 +51,30 @@ properties:
> > >      description: ID of the controller reset line
> > >      const: 1
> > >  
> > > +  airoha,chip-scu:
> > > +    $ref: /schemas/types.yaml#/definitions/phandle
> > > +    description: phandle to the Chip SCU providing the registers required
> > > +      for configuring the PCIe related clocks and resets.
> > 
> > This is the clock provider. Clock provider should not be accessing
> > registers of other device to configure its clocks. Either you
> > misrepresented clock hierarchy or devices.
> > 
> > I did search for DTS to try to understand the big pictuer - nothing, no
> > results, no upstream submission to Linux kernel.
> >
> 
> Hi, you can use en7581 as an example as the implementation is exactly the
> same register wise.
> 
> The register for clock and reset for normal system and PCIe are scattered
> between the "SCU" and "chip SCU" registers (they are 2 different register
> block, the name is taken from the programming guide)
> 
> - Chip SCU provide register access to some clk gate and clk rate
> - SCU provide register for reset, PCIe clock, other clock gate and PHY
>   SERDES.
> 
> Upcoming and current airoha clock driver all follow this pattern of
> declaring one of the 2 register and use a sysconf for the other as the 2
> register block are tighlty coupled.
> 
> There was a similar phandle in another series adding support for pinctrl
> for econet EN7528.
> 
> This phandle is not present for en7581 just because it's hidden by a direct
> call to the syscon with syscon_regmap_lookup_by_compatible API.
> 
> With AN7583 I'm trying to fix this by making it more explicit.
> 
> Does this makes the situation more clear? 
> 

Hi, I would like to send a new revision of this since the clock driver
needs to be rebased.

Any hint on this, is the syscon phandle OK after the above explainations?

-- 
	Ansuel